Newer
Older
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. MSM cobalt";
compatible = "qcom,msmcobalt-cdp", "qcom,msmcobalt", "qcom,cdp";
qcom,msm-id = <0x124 0x0>;
interrupt-parent = <0x1>;
qcom,board-id = <0x1 0x0>;
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
qcom,limits-info = <0x2>;
enable-method = "psci";
next-level-cache = <0x3>;
qcom,ea = <0x4>;
linux,phandle = <0x14>;
phandle = <0x14>;
l2-cache {
compatible = "arm,arch-cache";
cache-level = <0x2>;
qcom,dump-size = <0x0>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x5f>;
phandle = <0x5f>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
};
cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
qcom,limits-info = <0x5>;
enable-method = "psci";
next-level-cache = <0x3>;
qcom,ea = <0x6>;
linux,phandle = <0x15>;
phandle = <0x15>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
};
cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
qcom,limits-info = <0x7>;
enable-method = "psci";
next-level-cache = <0x3>;
qcom,ea = <0x8>;
linux,phandle = <0x16>;
phandle = <0x16>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x61>;
phandle = <0x61>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x69>;
phandle = <0x69>;
};
};
cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
qcom,limits-info = <0x9>;
enable-method = "psci";
next-level-cache = <0x3>;
qcom,ea = <0xa>;
linux,phandle = <0x17>;
phandle = <0x17>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x62>;
phandle = <0x62>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x9040>;
linux,phandle = <0x6a>;
phandle = <0x6a>;
};
};
cpu@100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x100>;
qcom,limits-info = <0xb>;
enable-method = "psci";
next-level-cache = <0xc>;
qcom,ea = <0xd>;
linux,phandle = <0x18>;
phandle = <0x18>;
l2-cache {
compatible = "arm,arch-cache";
cache-level = <0x2>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x6b>;
phandle = <0x6b>;
};
};
cpu@101 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x101>;
qcom,limits-info = <0xe>;
enable-method = "psci";
next-level-cache = <0xc>;
qcom,ea = <0xf>;
linux,phandle = <0x19>;
phandle = <0x19>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x6c>;
phandle = <0x6c>;
};
};
cpu@102 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x102>;
qcom,limits-info = <0x10>;
enable-method = "psci";
next-level-cache = <0xc>;
qcom,ea = <0x11>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x6d>;
phandle = <0x6d>;
};
};
cpu@103 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x103>;
qcom,limits-info = <0x12>;
enable-method = "psci";
next-level-cache = <0xc>;
qcom,ea = <0x13>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x66>;
phandle = <0x66>;
};
l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x12000>;
linux,phandle = <0x6e>;
phandle = <0x6e>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <0x14>;
};
core1 {
cpu = <0x15>;
};
core2 {
cpu = <0x16>;
};
core3 {
cpu = <0x17>;
};
};
cluster1 {
core0 {
cpu = <0x18>;
};
core1 {
cpu = <0x19>;
};
core2 {
cpu = <0x1a>;
};
core3 {
cpu = <0x1b>;
};
};
};
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x0 0x0 0xffffffff>;
compatible = "simple-bus";
qcom,smp2p-modem@17911008 {
compatible = "qcom,smp2p";
reg = <0x17911008 0x4>;
qcom,remote-pid = <0x1>;
qcom,irq-bitmask = <0x4000>;
interrupts = <0x0 0x1c3 0x1>;
};
qcom,smp2p-adsp@17911008 {
compatible = "qcom,smp2p";
reg = <0x17911008 0x4>;
qcom,remote-pid = <0x2>;
qcom,irq-bitmask = <0x400>;
interrupts = <0x0 0x9e 0x1>;
};
qcom,smp2p-dsps@17911008 {
compatible = "qcom,smp2p";
reg = <0x17911008 0x4>;
qcom,remote-pid = <0x3>;
qcom,irq-bitmask = <0x4000000>;
interrupts = <0x0 0xb2 0x1>;
};
qcom,smp2pgpio-smp2p-15-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0xf>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
qcom,smp2pgpio_test_smp2p_15_in {
compatible = "qcom,smp2pgpio_test_smp2p_15_in";
gpios = <0x1c 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-15-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0xf>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
qcom,smp2pgpio_test_smp2p_15_out {
compatible = "qcom,smp2pgpio_test_smp2p_15_out";
gpios = <0x1d 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
qcom,smp2pgpio_test_smp2p_1_in {
compatible = "qcom,smp2pgpio_test_smp2p_1_in";
gpios = <0x1e 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x1>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
qcom,smp2pgpio_test_smp2p_1_out {
compatible = "qcom,smp2pgpio_test_smp2p_1_out";
gpios = <0x1f 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
qcom,smp2pgpio_test_smp2p_2_in {
compatible = "qcom,smp2pgpio_test_smp2p_2_in";
gpios = <0x20 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x2>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
qcom,smp2pgpio_test_smp2p_2_out {
compatible = "qcom,smp2pgpio_test_smp2p_2_out";
gpios = <0x21 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-3-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x3>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
qcom,smp2pgpio_test_smp2p_3_in {
compatible = "qcom,smp2pgpio_test_smp2p_3_in";
gpios = <0x22 0x0 0x0>;
};
qcom,smp2pgpio-smp2p-3-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "smp2p";
qcom,remote-pid = <0x3>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x23>;
phandle = <0x23>;
};
qcom,smp2pgpio-ssr-smp2p-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <0x1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
qcom,smp2pgpio-ssr-smp2p-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <0x1>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x50>;
phandle = <0x50>;
};
qcom,smp2pgpio-ssr-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <0x2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
qcom,smp2pgpio-ssr-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <0x2>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
qcom,smp2pgpio-ssr-smp2p-3-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <0x3>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
qcom,smp2pgpio-ssr-smp2p-3-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <0x3>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x5c>;
phandle = <0x5c>;
};
qcom,smp2pgpio_test_smp2p_3_out {
compatible = "qcom,smp2pgpio_test_smp2p_3_out";
gpios = <0x23 0x0 0x0>;
};
qcom,smp2pgpio-sleepstate-gpio-3-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "sleepstate";
qcom,remote-pid = <0x3>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x24>;
phandle = <0x24>;
};
qcom,smp2pgpio-sleepstate-3-out {
compatible = "qcom,smp2pgpio_sleepstate_3_out";
gpios = <0x24 0x0 0x0>;
};
qcom,smp2pgpio-ipa-1-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "ipa";
qcom,remote-pid = <0x1>;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
qcom,smp2pgpio-ipa-1-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "ipa";
qcom,remote-pid = <0x1>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
qcom,gdsc@10f004 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_usb30";
reg = <0x10f004 0x4>;
status = "ok";
clock-names = "core_clk";
clocks = <0x25 0xb3b4e2cb>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
qcom,gdsc@16b004 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_pcie_0";
reg = <0x16b004 0x4>;
status = "ok";
clock-names = "master_bus_clk", "slave_bus_clk", "core_clk";
clocks = <0x25 0x3f85285b 0x25 0xd69638a1 0x25 0x4f37621e>;
};
qcom,gdsc@175004 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_ufs";
reg = <0x175004 0x4>;
status = "ok";
clock-names = "bus_clk", "ice_clk", "unipro_clk";
clocks = <0x25 0x47c743a7 0x25 0x310b0710 0x25 0x2daf7fd2>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
qcom,gdsc@17d034 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_hlos1_vote_lpass_adsp";
reg = <0x17d034 0x4>;
qcom,no-status-check-on-disable;
status = "ok";
linux,phandle = <0x6f>;
phandle = <0x6f>;
};
qcom,gdsc@17d038 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_hlos1_vote_lpass_core";
reg = <0x17d038 0x4>;
qcom,no-status-check-on-disable;
status = "ok";
};
qcom,gdsc@c8ce020 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_bimc_smmu";
reg = <0xc8ce020 0x4 0xc8ce024 0x4>;
reg-names = "base", "hw_ctrl_addr";
qcom,no-status-check-on-disable;
status = "ok";
clock-names = "bus_clk";
clocks = <0x26 0xc365ac39>;
linux,phandle = <0x70>;
phandle = <0x70>;
};
qcom,gdsc@c8c1024 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_venus";
reg = <0xc8c1024 0x4>;
status = "ok";
clock-names = "bus_clk", "maxi_clk", "core_clk";
clocks = <0x26 0xf3178ba5 0x26 0x1785ef88 0x26 0x78f14c85>;
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
qcom,gdsc@c8c1040 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_venus_core0";
reg = <0xc8c1040 0x4>;
status = "ok";
clock-names = "core0_clk";
clocks = <0x26 0x23fae359>;
};
qcom,gdsc@c8c1044 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_venus_core1";
reg = <0xc8c1044 0x4>;
status = "ok";
clock-names = "core1_clk";
clocks = <0x26 0x5213a0c7>;
};
qcom,gdsc@c8c34a0 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_camss_top";
reg = <0xc8c34a0 0x4>;
status = "ok";
clock-names = "bus_clk", "vfe_axi";
clocks = <0x26 0xd84e390b 0x26 0xe626d8a1>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
qcom,gdsc@c8c3664 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_vfe0";
reg = <0xc8c3664 0x4>;
status = "ok";
clock-names = "core0_clk", "core0_stream_clk";
clocks = <0x26 0xead28288 0x26 0xa0428287>;
parent-supply = <0x27>;
linux,phandle = <0x77>;
phandle = <0x77>;
};
qcom,gdsc@c8c3674 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_vfe1";
reg = <0xc8c3674 0x4>;
status = "ok";
clock-names = "core1_clk", "core1_stream_clk";
clocks = <0x26 0xc216b14d 0x26 0x745af3b6>;
parent-supply = <0x27>;
linux,phandle = <0x78>;
phandle = <0x78>;
};
qcom,gdsc@c8c36d4 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_cpp";
reg = <0xc8c36d4 0x4>;
status = "ok";
clock-names = "core_clk";
clocks = <0x26 0x8e99ef57>;
parent-supply = <0x27>;
linux,phandle = <0x76>;
phandle = <0x76>;
};
qcom,gdsc@c8c2304 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_mdss";
reg = <0xc8c2304 0x4>;
status = "ok";
clock-names = "bus_clk", "core_clk", "root_clk";
clocks = <0x26 0xdf04fc1d 0x26 0x43539b0e 0x26 0xbb7e71c4>;
linux,phandle = <0x119>;
phandle = <0x119>;
};
qcom,gdsc@5066004 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_gpu_cx";
reg = <0x5066004 0x4 0x5066008 0x4>;
reg-names = "base", "hw_ctrl_addr";
qcom,no-status-check-on-disable;
status = "ok";
linux,phandle = <0x72>;
phandle = <0x72>;
};
qcom,gdsc@5066094 {
compatible = "qcom,gdsc";
regulator-name = "gdsc_gpu_gx";
reg = <0x5066094 0x4 0x5065130 0x4 0x5066090 0x4>;
reg-names = "base", "domain_addr", "sw_reset";
qcom,retain-periph;
qcom,reset-aon-logic;
status = "ok";
clock-names = "bimc_core_clk", "core_clk", "core_root_clk";
clocks = <0x25 0x3909459b 0x28 0x95f01bd5 0x28 0x917f76ef>;
qcom,force-enable-root-clk;
parent-supply = <0x29>;
linux,phandle = <0x117>;
phandle = <0x117>;
};
interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
reg = <0x17a00000 0x10000 0x17b00000 0x100000>;
#interrupt-cells = <0x3>;
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
interrupt-controller;
#redistributor-regions = <0x1>;
redistributor-stride = <0x0 0x20000>;
interrupts = <0x1 0x9 0x4>;
linux,phandle = <0x1>;
phandle = <0x1>;
gic-its@0x17a20000 {
compatible = "arm,gic-v3-its";
msi-contoller;
reg = <0x17a20000 0x20000>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x1 0x1 0xf08 0x1 0x2 0xf08 0x1 0x3 0xf08 0x1 0x0 0xf08>;
clock-frequency = <0x124f800>;
};
restart@10ac000 {
compatible = "qcom,pshold";
reg = <0x10ac000 0x4 0x1fd3000 0x4>;
reg-names = "pshold-base", "tcsr-boot-misc-detect";
};
qcom,sps {
compatible = "qcom,msm_sps_4k";
qcom,pipe-attr-ee;
};
serial@0c170000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xc170000 0x1000>;
interrupts = <0x0 0x6c 0x0>;
status = "disabled";
clocks = <0x25 0xf8a61c96 0x25 0x8caa5b4f>;
clock-names = "core_clk", "iface_clk";
};
serial@0c1b0000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xc1b0000 0x1000>;
interrupts = <0x0 0x72 0x0>;
status = "disabled";
clocks = <0x25 0x1e1965a3 0x25 0x8f283c1d>;
clock-names = "core_clk", "iface_clk";
};
timer@17920000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0x17920000 0x1000>;
clock-frequency = <0x124f800>;
frame@17921000 {
frame-number = <0x0>;
interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>;
reg = <0x17921000 0x1000 0x17922000 0x1000>;
};
frame@17923000 {
frame-number = <0x1>;
interrupts = <0x0 0x9 0x4>;
reg = <0x17923000 0x1000>;
status = "disabled";
};
frame@17924000 {
frame-number = <0x2>;
interrupts = <0x0 0xa 0x4>;
reg = <0x17924000 0x1000>;
status = "disabled";
};
frame@17925000 {
frame-number = <0x3>;
interrupts = <0x0 0xb 0x4>;
reg = <0x17925000 0x1000>;
status = "disabled";
};
frame@17926000 {
frame-number = <0x4>;
interrupts = <0x0 0xc 0x4>;
reg = <0x17926000 0x1000>;
status = "disabled";
};
frame@17927000 {
frame-number = <0x5>;
interrupts = <0x0 0xd 0x4>;
reg = <0x17927000 0x1000>;
status = "disabled";
};
frame@17928000 {
frame-number = <0x6>;
interrupts = <0x0 0xe 0x4>;
reg = <0x17928000 0x1000>;
status = "disabled";
};
};
qcom,cpubw {
compatible = "qcom,devbw";
governor = "performance";
qcom,src-dst-ports = <0x1 0x200>;
qcom,active-only;
qcom,bw-tbl = <0x2fa 0x478 0x5f5 0x8f0 0xc47 0x104d 0x144b 0x16e3 0x1e4f 0x269f 0x2e57 0x35c3>;
};
qcom,mincpubw {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <0x1 0x200>;
qcom,active-only;
qcom,bw-tbl = <0x2fa 0x478 0x5f5 0x8f0 0xc47 0x104d 0x144b 0x16e3 0x1e4f 0x269f 0x2e57 0x35c3>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
qcom,memlat-cpu0 {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <0x1 0x200>;
qcom,active-only;
qcom,bw-tbl = <0x2fa 0x478 0x5f5 0x8f0 0xc47 0x104d 0x144b 0x16e3 0x1e4f 0x269f 0x2e57 0x35c3>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
qcom,memlat-cpu4 {
compatible = "qcom,devbw";
governor = "powersave";
qcom,src-dst-ports = <0x1 0x200>;
qcom,active-only;
qcom,bw-tbl = <0x2fa 0x478 0x5f5 0x8f0 0xc47 0x104d 0x144b 0x16e3 0x1e4f 0x269f 0x2e57 0x35c3>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
qcom,arm-memlat-mon-0 {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <0x14 0x15 0x16 0x17>;
qcom,target-dev = <0x2a>;
};
qcom,arm-memlat-mon-4 {
compatible = "qcom,arm-memlat-mon";
qcom,cpulist = <0x18 0x19 0x1a 0x1b>;
qcom,target-dev = <0x2b>;
};
devfreq-cpufreq {
mincpubw-cpufreq {
target-dev = <0x2c>;
cpu-to-dev-map-0 = <0x1cb600 0x5f5>;
cpu-to-dev-map-4 = <0x1ec300 0x5f5 0x1fef00 0x144b>;
};
};
qcom,msm-cpufreq {
compatible = "qcom,msm-cpufreq";
clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk", "cpu4_clk", "cpu5_clk", "cpu6_clk", "cpu7_clk";
clocks = <0x2d 0xc554130e 0x2d 0xc554130e 0x2d 0xc554130e 0x2d 0xc554130e 0x2d 0x58869997 0x2d 0x58869997 0x2d 0x58869997 0x2d 0x58869997>;
qcom,governor-per-policy;
qcom,cpufreq-table-0 = <0x493e0 0x54600 0x67200 0x79e00 0x8ca00 0x9ab00 0xad700 0xc4e00 0xd7a00 0xea600 0xfd200 0x10fe00 0x122a00 0x130b00 0x143700 0x156300 0x168f00 0x180600 0x193200 0x1a5e00 0x1b8a00 0x1cb600>;
qcom,cpufreq-table-4 = <0x493e0 0x54600 0x67200 0x75300 0x87f00 0x9ab00 0xad700 0xc0300 0xce400 0xdc500 0xef100 0x101d00 0x11df00 0x130b00 0x143700 0x156300 0x168f00 0x177000 0x18e700 0x1a1300 0x1b3f00 0x1c6b00 0x1d9700 0x1ec300 0x1fef00>;
};
arm64-cpu-erp {
compatible = "arm,arm64-cpu-erp";
interrupts = <0x0 0x2b 0x4 0x0 0x2c 0x4 0x0 0x29 0x4 0x0 0x2a 0x4>;
interrupt-names = "pri-dbe-irq", "sec-dbe-irq", "pri-ext-irq", "sec-ext-irq";
poll-delay-ms = <0x1388>;
};
qcom,gcc@100000 {
compatible = "qcom,gcc-cobalt";
reg = <0x100000 0xb0000>;
reg-names = "cc_base";
vdd_dig-supply = <0x2e>;
#clock-cells = <0x1>;
linux,phandle = <0x25>;
phandle = <0x25>;
};
qcom,mmsscc@c8c0000 {
compatible = "qcom,mmsscc-cobalt";
reg = <0xc8c0000 0x40000>;
reg-names = "cc_base";
vdd_dig-supply = <0x2e>;
clock-names = "xo", "gpll0", "gpll0_div";
clocks = <0x25 0x79e95308 0x25 0xe9374de7 0x25 0xdd06848d>;
#clock-cells = <0x1>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
qcom,gpucc@5065000 {
compatible = "qcom,gpucc-cobalt";
reg = <0x5065000 0x9000>;
reg-names = "cc_base";
vdd_gpucc-supply = <0x29>;
vdd_dig-supply = <0x2e>;
vdd_mx-supply = <0x2f>;
vdd_gpu_mx-supply = <0x2f>;
qcom,gfx3d_clk_src-opp-store-vcorner = <0x30>;
clock-names = "xo_ao", "gpll0";
clocks = <0x25 0x64eb6004 0x25 0xe9374de7>;
qcom,gfxfreq-speedbin0 = <0x0 0x0 0x0 0xa3140c0 0x7ef40 0x80 0xef5f4c0 0x8b290 0x80 0x13c9eb00 0x99cf0 0x80 0x18054ac0 0xa6040 0x80 0x1e0a6e00 0xb5e28 0x100 0x26be3680 0xd0bd8 0x180>;
qcom,gfxfreq-mx-speedbin0 = <0x0 0x0 0xa3140c0 0x80 0xef5f4c0 0x80 0x13c9eb00 0x80 0x18054ac0 0x80 0x1e0a6e00 0x100 0x26be3680 0x180>;
#clock-cells = <0x1>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
qcom,cpu-clock-cobalt@179c0000 {
compatible = "qcom,cpu-clock-osm";
reg = <0x179c0000 0x4000 0x17916000 0x1000 0x17816000 0x1000>;
reg-names = "osm", "pwrcl_pll", "perfcl_pll";
vdd-pwrcl-supply = <0x31>;
vdd-perfcl-supply = <0x32>;
interrupts = <0x0 0x23 0x1 0x0 0x24 0x1>;
interrupt-names = "pwrcl-irq", "perfcl-irq";
qcom,pwrcl-speedbin0-v0 = <0x11e1a300 0x4000f 0x31e001e 0x1 0x14997000 0x5040012 0x4200020 0x1 0x192d5000 0x5040016 0x4200020 0x1 0x1dc13000 0x504001a 0x5200020 0x1 0x22551000 0x504001e 0x6200020 0x1 0x25c3f800 0x4040021 0x7200020 0x1 0x2a57d800 0x4040025 0x7200020 0x1 0x3010b000 0x404002a 0x8220022 0x2 0x34a49000 0x404002e 0x9250025 0x2 0x39387000 0x4040032 0xa280028 0x2 0x3dcc5000 0x4040036 0xb2b002b 0x3 0x42603000 0x404003a 0xc2e002e 0x3 0x46f41000 0x404003e 0xc320032 0x3 0x4a62f800 0x4040041 0xd340034 0x3 0x4ef6d800 0x4040045 0xe370037 0x3 0x538ab800 0x4040049 0xf3a003a 0x3 0x581e9800 0x404004d 0x103e003e 0x3 0x5dd77000 0x4040052 0x10420042 0x4 0x626b5000 0x4040056 0x11450045 0x4 0x66ff3000 0x404005a 0x12480048 0x4 0x6b931000 0x404005e 0x134b004b 0x4 0x7026f000 0x4040062 0x144e004e 0x4>;
qcom,perfcl-speedbin0-v0 = <0x11e1a300 0x4000f 0x3200020 0x1 0x14997000 0x5040012 0x4200020 0x1 0x192d5000 0x5040016 0x4200020 0x1 0x1c9c3800 0x5040019 0x5200020 0x1 0x21301800 0x504001d 0x6200020 0x1 0x25c3f800 0x4040021 0x7200020 0x1 0x2a57d800 0x4040025 0x7200020 0x1 0x2eebb800 0x4040029 0x8210021 0x1 0x325aa000 0x404002c 0x9240024 0x2 0x35c98800 0x404002f 0x9260026 0x2 0x3a5d6800 0x4040033 0xa290029 0x2 0x3ef14800 0x4040037 0xb2c002c 0x2 0x45cf1800 0x404003d 0xc300030 0x3 0x4a62f800 0x4040041 0xd340034 0x3 0x4ef6d800 0x4040045 0xe370037 0x3 0x538ab800 0x4040049 0xf3b003b 0x3 0x581e9800 0x404004d 0xf3e003e 0x3 0x5b8d8000 0x4040050 0x10400040 0x3 0x61465800 0x4040055 0x11440044 0x4 0x65da3800 0x4040059 0x12480048 0x4 0x6a6e1800 0x404005d 0x134a004a 0x4 0x6f01f800 0x4040061 0x134e004e 0x4 0x7395d800 0x4040065 0x14510051 0x4 0x7829b800 0x4040069 0x15540054 0x4 0x7cbd9800 0x404006d 0x16570057 0x4>;
qcom,osm-pll-setup;
qcom,up-timer = <0x1 0x1>;
qcom,down-timer = <0x1 0x1>;
qcom,pc-override-index = <0x0 0x0>;
qcom,set-ret-inactive;
qcom,enable-llm-freq-vote;
qcom,llm-freq-up-timer = <0x1 0x1>;
qcom,llm-freq-down-timer = <0x1 0x1>;
qcom,enable-llm-volt-vote;
qcom,llm-volt-up-timer = <0x1 0x1>;
qcom,llm-volt-down-timer = <0x1 0x1>;
qcom,cc-reads = <0xa>;
qcom,cc-delay = <0x5>;
qcom,cc-factor = <0x64>;
qcom,osm-clk-rate = <0xbebc200>;
qcom,xo-clk-rate = <0x124f800>;
qcom,l-val-base = <0x17916004 0x17816004>;
qcom,apcs-itm-present = <0x179d143c 0x179d143c>;
qcom,apcs-pll-user-ctl = <0x1791600c 0x1781600c>;