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13.dtsdump_Qualcomm_Technologies,_Inc._QM215.dts 264.85 KiB
/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "Qualcomm Technologies, Inc. QM215";
	compatible = "qcom,qm215";
	qcom,msm-id = <0x182 0x0>;
	interrupt-parent = <0x1>;
	qcom,msm-name = "QM215";
	qcom,pmic-name = "PM8916";

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu-map {

			cluster0 {
			};

			cluster1 {

				core0 {
					cpu = <0x2>;
				};

				core1 {
					cpu = <0x3>;
				};

				core2 {
					cpu = <0x4>;
				};

				core3 {
					cpu = <0x5>;
				};
			};
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x100>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <0x400>;
			sched-energy-costs = <0x6 0x7>;
			next-level-cache = <0x8>;
			#cooling-cells = <0x2>;
			phandle = <0x2>;

			l2-cache {
				compatible = "arm,arch-cache";
				cache-level = <0x2>;
				qcom,dump-size = <0x0>;
				phandle = <0x8>;
			};

			l1-icache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x8800>;
				phandle = <0x16>;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x9000>;
				phandle = <0x1a>;
			};
		};

		cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x101>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <0x400>;
			sched-energy-costs = <0x6 0x7>;
			next-level-cache = <0x8>;
			#cooling-cells = <0x2>;
			phandle = <0x3>;

			l1-icache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x8800>;
				phandle = <0x17>;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x9000>;
				phandle = <0x1b>;
			};
		};

		cpu@102 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x102>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <0x400>;
			sched-energy-costs = <0x6 0x7>;
			next-level-cache = <0x8>;
			#cooling-cells = <0x2>;
			phandle = <0x4>;

			l1-icache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x8800>;
				phandle = <0x18>;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x9000>;
				phandle = <0x1c>;
			};
		};

		cpu@103 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x103>;
			enable-method = "psci";
			cpu-release-addr = <0x0 0x90000000>;
			efficiency = <0x400>;
			sched-energy-costs = <0x6 0x7>;
			next-level-cache = <0x8>;
			#cooling-cells = <0x2>;
			phandle = <0x5>;

			l1-icache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x8800>;
				phandle = <0x19>;
			};

			l1-dcache {
				compatible = "arm,arch-cache";
				qcom,dump-size = <0x9000>;
				phandle = <0x1d>;
			};
		};
	};

	soc {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x0 0xffffffff>;
		compatible = "simple-bus";
		phandle = <0x121>;

		pinctrl@1000000 {
			compatible = "qcom,msm8917-pinctrl";
			reg = <0x1000000 0x300000>;
			reg-names = "pinctrl_regs";
			interrupts-extended = <0x1 0x0 0xd0 0x0>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			interrupt-parent = <0x9>;
			#interrupt-cells = <0x2>;
			phandle = <0x15>;

			cci {

				cci0_active {
					phandle = <0x11>;

					mux {
						pins = "gpio29", "gpio30";
						function = "cci_i2c";
					};

					config {
						pins = "gpio29", "gpio30";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				cci0_suspend {
					phandle = <0x13>;

					mux {
						pins = "gpio29", "gpio30";
						function = "cci_i2c";
					};

					config {
						pins = "gpio29", "gpio30";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				cci1_active {
					phandle = <0x12>;

					mux {
						pins = "gpio31", "gpio32";
						function = "cci_i2c";
					};

					config {
						pins = "gpio31", "gpio32";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				cci1_suspend {
					phandle = <0x14>;

					mux {
						pins = "gpio31", "gpio32";
						function = "cci_i2c";
					};

					config {
						pins = "gpio31", "gpio32";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			cam_sensor_mclk0_default {
				phandle = <0x122>;

				mux {
					pins = "gpio26";
					function = "cam_mclk";
				};

				config {
					pins = "gpio26";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_mclk0_sleep {
				phandle = <0x123>;

				mux {
					pins = "gpio26";
					function = "cam_mclk";
				};

				config {
					pins = "gpio26";
					bias-pull-down;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_default {
				phandle = <0x124>;

				mux {
					pins = "gpio36", "gpio35";
					function = "gpio";
				};

				config {
					pins = "gpio36", "gpio35";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_sleep {
				phandle = <0x125>;

				mux {
					pins = "gpio36", "gpio35";
					function = "gpio";
				};

				config {
					pins = "gpio36", "gpio35";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_vdig {
				phandle = <0x126>;

				mux {
					pins = "gpio62";
					function = "gpio";
				};

				config {
					pins = "gpio62";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_vdig_sleep {
				phandle = <0x127>;

				mux {
					pins = "gpio62";
					function = "gpio";
				};

				config {
					pins = "gpio62";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_vdig_qm215 {
				phandle = <0x128>;

				mux {
					pins = "gpio25";
					function = "gpio";
				};

				config {
					pins = "gpio25";
					output-high;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_rear_vdig_sleep_qm215 {
				phandle = <0x129>;

				mux {
					pins = "gpio25";
					function = "gpio";
				};

				config {
					pins = "gpio25";
					output-low;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_mclk1_default {
				phandle = <0x12a>;

				mux {
					pins = "gpio27";
					function = "cam_mclk";
				};

				config {
					pins = "gpio27";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_mclk1_sleep {
				phandle = <0x12b>;

				mux {
					pins = "gpio27";
					function = "cam_mclk";
				};

				config {
					pins = "gpio27";
					bias-pull-down;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_front_default {
				phandle = <0x12c>;

				mux {
					pins = "gpio38", "gpio50";
					function = "gpio";
				};

				config {
					pins = "gpio38", "gpio50";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_front_sleep {
				phandle = <0x12d>;

				mux {
					pins = "gpio38", "gpio50";
					function = "gpio";
				};

				config {
					pins = "gpio38", "gpio50";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_mclk2_default {
				phandle = <0x12e>;

				mux {
					pins = "gpio28";
					function = "cam_mclk";
				};

				config {
					pins = "gpio28";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_mclk2_sleep {
				phandle = <0x12f>;

				mux {
					pins = "gpio28";
					function = "cam_mclk";
				};

				config {
					pins = "gpio28";
					bias-pull-down;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_front1_default {
				phandle = <0x130>;

				mux {
					pins = "gpio40", "gpio39";
					function = "gpio";
				};

				config {
					pins = "gpio40", "gpio39";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			cam_sensor_front1_sleep {
				phandle = <0x131>;

				mux {
					pins = "gpio40", "gpio39";
					function = "gpio";
				};

				config {
					pins = "gpio40", "gpio39";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			pmx_ts_int_active {

				ts_int_active {
					phandle = <0x132>;

					mux {
						pins = "gpio65";
						function = "gpio";
					};

					config {
						pins = "gpio65";
						drive-strength = <0x8>;
						bias-pull-up;
					};
				};
			};

			pmx_ts_int_suspend {

				ts_int_suspend {
					phandle = <0x133>;

					mux {
						pins = "gpio65";
						function = "gpio";
					};

					config {
						pins = "gpio65";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pmx_ts_reset_active {

				ts_reset_active {
					phandle = <0x134>;

					mux {
						pins = "gpio64";
						function = "gpio";
					};

					config {
						pins = "gpio64";
						drive-strength = <0x8>;
						bias-pull-up;
					};
				};
			};

			pmx_ts_reset_suspend {

				ts_reset_suspend {
					phandle = <0x135>;

					mux {
						pins = "gpio64";
						function = "gpio";
					};

					config {
						pins = "gpio64";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pmx_ts_release {

				ts_release {
					phandle = <0x136>;

					mux {
						pins = "gpio65", "gpio64";
						function = "gpio";
					};

					config {
						pins = "gpio65", "gpio64";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pmx-uartconsole {

				uart_console_active {
					phandle = <0x137>;

					mux {
						pins = "gpio4", "gpio5";
						function = "blsp_uart2";
					};

					config {
						pins = "gpio4", "gpio5";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				uart_console_sleep {
					phandle = <0x138>;

					mux {
						pins = "gpio4", "gpio5";
						function = "blsp_uart2";
					};

					config {
						pins = "gpio4", "gpio5";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			blsp1_uart1 {

				blsp1_uart1_active {
					phandle = <0xae>;

					mux {
						pins = "gpio0", "gpio1", "gpio2", "gpio3";
						function = "blsp_uart1";
					};

					config {
						pins = "gpio0", "gpio1", "gpio2", "gpio3";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				blsp1_uart1_sleep {
					phandle = <0xad>;

					mux {
						pins = "gpio0", "gpio1", "gpio2", "gpio3";
						function = "gpio";
					};

					config {
						pins = "gpio0", "gpio1", "gpio2", "gpio3";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			wcnss_pmux_5wire {

				wcnss_default {
					phandle = <0xe2>;

					wcss_wlan2 {
						pins = "gpio76";
						function = "wcss_wlan2";
					};

					wcss_wlan1 {
						pins = "gpio77";
						function = "wcss_wlan1";
					};

					wcss_wlan0 {
						pins = "gpio78";
						function = "wcss_wlan0";
					};

					wcss_wlan {
						pins = "gpio79", "gpio80";
						function = "wcss_wlan";
					};

					config {
						pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80";
						drive-strength = <0x6>;
						bias-pull-up;
					};
				};

				wcnss_sleep {
					phandle = <0xe3>;

					wcss_wlan2 {
						pins = "gpio76";
						function = "wcss_wlan2";
					};

					wcss_wlan1 {
						pins = "gpio77";
						function = "wcss_wlan1";
					};

					wcss_wlan0 {
						pins = "gpio78";
						function = "wcss_wlan0";
					};

					wcss_wlan {
						pins = "gpio79", "gpio80";
						function = "wcss_wlan";
					};

					config {
						pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			wcnss_pmux_gpio {
				phandle = <0x139>;

				wcnss_gpio_default {
					phandle = <0xe4>;

					mux {
						pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80";
						function = "gpio";
					};

					config {
						pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80";
						drive-strength = <0x6>;
						bias-pull-up;
					};
				};
			};

			cdc_mclk2_pin {

				cdc_mclk2_sleep {
					phandle = <0x13a>;

					mux {
						pins = "gpio66";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio66";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				cdc_mclk2_active {
					phandle = <0x13b>;

					mux {
						pins = "gpio66";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio66";
						drive-strength = <0x8>;
						bias-disable;
					};
				};
			};

			pmx_mdss {
				phandle = <0x13c>;

				mdss_dsi_active {
					phandle = <0x13d>;

					mux {
						pins = "gpio60", "gpio98";
						function = "gpio";
					};

					config {
						pins = "gpio60", "gpio98";
						drive-strength = <0x8>;
						bias-disable = <0x0>;
						output-high;
					};
				};

				mdss_dsi_suspend {
					phandle = <0x13e>;

					mux {
						pins = "gpio60", "gpio98";
						function = "gpio";
					};

					config {
						pins = "gpio60", "gpio98";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pmx_mdss_te {

				mdss_te_active {
					phandle = <0x13f>;

					mux {
						pins = "gpio24";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio24";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				mdss_te_suspend {
					phandle = <0x140>;

					mux {
						pins = "gpio24";
						function = "mdp_vsync";
					};

					config {
						pins = "gpio24";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pmx_qdsd_clk {

				clk_sdcard {
					phandle = <0x141>;

					config {
						pins = "qdsd_clk";
						bias-disable;
						drive-strength = <0x10>;
					};
				};

				clk_trace {
					phandle = <0x142>;

					config {
						pins = "qdsd_clk";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				clk_swdtrc {
					phandle = <0x143>;

					config {
						pins = "qdsd_clk";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				clk_spmi {
					phandle = <0x144>;

					config {
						pins = "qdsd_clk";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_qdsd_cmd {

				cmd_sdcard {
					phandle = <0x145>;

					config {
						pins = "qdsd_cmd";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				cmd_trace {
					phandle = <0x146>;

					config {
						pins = "qdsd_cmd";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				cmd_uart {
					phandle = <0x147>;

					config {
						pins = "qdsd_cmd";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				cmd_swdtrc {
					phandle = <0x148>;

					config {
						pins = "qdsd_cmd";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				cmd_jtag {
					phandle = <0x149>;

					config {
						pins = "qdsd_cmd";
						bias-disable;
						drive-strength = <0x8>;
					};
				};

				cmd_spmi {
					phandle = <0x14a>;

					config {
						pins = "qdsd_cmd";
						bias-pull-down;
						drive-strength = <0xa>;
					};
				};
			};

			pmx_qdsd_data0 {

				data0_sdcard {
					phandle = <0x14b>;

					config {
						pins = "qdsd_data0";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data0_trace {
					phandle = <0x14c>;

					config {
						pins = "qdsd_data0";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data0_uart {
					phandle = <0x14d>;

					config {
						pins = "qdsd_data0";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data0_swdtrc {
					phandle = <0x14e>;

					config {
						pins = "qdsd_data0";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data0_jtag {
					phandle = <0x14f>;

					config {
						pins = "qdsd_data0";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				data0_spmi {
					phandle = <0x150>;

					config {
						pins = "qdsd_data0";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_qdsd_data1 {

				data1_sdcard {
					phandle = <0x151>;

					config {
						pins = "qdsd_data1";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data1_trace {
					phandle = <0x152>;

					config {
						pins = "qdsd_data1";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data1_uart {
					phandle = <0x153>;

					config {
						pins = "qdsd_data1";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data1_swdtrc {
					phandle = <0x154>;

					config {
						pins = "qdsd_data1";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data1_jtag {
					phandle = <0x155>;

					config {
						pins = "qdsd_data1";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_qdsd_data2 {

				data2_sdcard {
					phandle = <0x156>;

					config {
						pins = "qdsd_data2";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data2_trace {
					phandle = <0x157>;

					config {
						pins = "qdsd_data2";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data2_uart {
					phandle = <0x158>;

					config {
						pins = "qdsd_data2";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data2_swdtrc {
					phandle = <0x159>;

					config {
						pins = "qdsd_data2";
						bias-pull-down;
						drive-strength = <0x2>;
					};
				};

				data2_jtag {
					phandle = <0x15a>;

					config {
						pins = "qdsd_data2";
						bias-pull-up;
						drive-strength = <0x8>;
					};
				};
			};

			pmx_qdsd_data3 {

				data3_sdcard {
					phandle = <0x15b>;

					config {
						pins = "qdsd_data3";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data3_trace {
					phandle = <0x15c>;

					config {
						pins = "qdsd_data3";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};

				data3_uart {
					phandle = <0x15d>;

					config {
						pins = "qdsd_data3";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				data3_swdtrc {
					phandle = <0x15e>;
					config {
						pins = "qdsd_data3";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				data3_jtag {
					phandle = <0x15f>;

					config {
						pins = "qdsd_data3";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};

				data3_spmi {
					phandle = <0x160>;

					config {
						pins = "qdsd_data3";
						bias-pull-down;
						drive-strength = <0x8>;
					};
				};
			};

			pmx_sdc1_rclk {

				sdc1_rclk_on {
					phandle = <0x161>;

					config {
						pins = "sdc1_rclk";
						bias-pull-down;
					};
				};

				sdc1_rclk_off {
					phandle = <0x162>;

					config {
						pins = "sdc1_rclk";
						bias-pull-down;
					};
				};
			};

			pmx_sdc1_clk {

				sdc1_clk_on {
					phandle = <0x163>;

					config {
						pins = "sdc1_clk";
						bias-disable;
						drive-strength = <0x10>;
					};
				};

				sdc1_clk_off {
					phandle = <0x164>;

					config {
						pins = "sdc1_clk";
						bias-disable;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_sdc1_cmd {

				sdc1_cmd_on {
					phandle = <0x165>;

					config {
						pins = "sdc1_cmd";
						bias-pull-up;
						drive-strength = <0xa>;
					};
				};

				sdc1_cmd_off {
					phandle = <0x166>;

					config {
						pins = "sdc1_cmd";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_sdc1_data {

				sdc1_data_on {
					phandle = <0x167>;

					config {
						pins = "sdc1_data";
						bias-pull-up;
						drive-strength = <0xa>;
					};
				};

				sdc1_data_off {
					phandle = <0x168>;

					config {
						pins = "sdc1_data";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};
			};

			sdhc2_cd_pin {

				cd_on {
					phandle = <0x169>;

					mux {
						pins = "gpio67";
						function = "gpio";
					};

					config {
						pins = "gpio67";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};

				cd_off {
					phandle = <0x16a>;

					mux {
						pins = "gpio67";
						function = "gpio";
					};

					config {
						pins = "gpio67";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			pmx_sdc2_clk {

				sdc2_clk_on {
					phandle = <0x16b>;

					config {
						pins = "sdc2_clk";
						drive-strength = <0x10>;
						bias-disable;
					};
				};

				sdc2_clk_off {
					phandle = <0x16c>;

					config {
						pins = "sdc2_clk";
						bias-disable;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_sdc2_cmd {

				sdc2_cmd_on {
					phandle = <0x16d>;

					config {
						pins = "sdc2_cmd";
						bias-pull-up;
						drive-strength = <0xa>;
					};
				};

				sdc2_cmd_off {
					phandle = <0x16e>;

					config {
						pins = "sdc2_cmd";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};
			};

			pmx_sdc2_data {

				sdc2_data_on {
					phandle = <0x16f>;

					config {
						pins = "sdc2_data";
						bias-pull-up;
						drive-strength = <0xa>;
					};
				};

				sdc2_data_off {
					phandle = <0x170>;

					config {
						pins = "sdc2_data";
						bias-pull-up;
						drive-strength = <0x2>;
					};
				};
			};

			sdc2_wlan_gpio {

				sdc2_wlan_gpio_active {
					phandle = <0x171>;

					config {
						pins = "gpio99";
						output-high;
						drive-strength = <0x8>;
						bias-pull-up;
					};
				};

				sdc2_wlan_gpio_sleep {
					phandle = <0x172>;

					config {
						pins = "gpio99";
						output-low;
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			wcd9xxx_intr {

				wcd_intr_default {
					phandle = <0x173>;

					mux {
						pins = "gpio73";
						function = "gpio";
					};

					config {
						pins = "gpio73";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};
			};

			pri_mi2s_mclk_b_lines {

				pri_mi2s_mclk_default {
					phandle = <0x174>;

					mux {
						pins = "gpio69";
						function = "pri_mi2s_mclk_b";
					};

					config {
						pins = "gpio69";
						drive-strength = <0x8>;
						bias-disable;
						input-enable;
					};
				};
			};

			sec_mi2s_mclk_a_lines {

				sec_mi2s_mclk_a_active {
					phandle = <0x175>;

					mux {
						pins = "gpio25";
						function = "sec_mi2s_mclk_a";
					};

					config {
						pins = "gpio25";
						drive-strength = <0x8>;
						output-high;
						bias-disable;
					};
				};

				sec_mi2s_mclk_a_sleep {
					phandle = <0x176>;

					mux {
						pins = "gpio25";
						function = "sec_mi2s_mclk_a";
					};

					config {
						pins = "gpio25";
						drive-strength = <0x2>;
						output-low;
						bias-pull-down;
					};
				};
			};

			cdc_reset_ctrl {

				cdc_reset_sleep {
					phandle = <0x177>;

					mux {
						pins = "gpio68";
						function = "gpio";
					};

					config {
						pins = "gpio68";
						drive-strength = <0x10>;
						bias-disable;
						output-low;
					};
				};

				cdc_reset_active {
					phandle = <0x178>;

					mux {
						pins = "gpio68";
						function = "gpio";
					};

					config {
						pins = "gpio68";
						drive-strength = <0x10>;
						bias-pull-down;
						output-high;
					};
				};
			};

			cdc-pdm-2-lines {

				pdm_lines_2_on {
					phandle = <0x11a>;

					mux {
						pins = "gpio70", "gpio71", "gpio72";
						function = "cdc_pdm0";
					};

					config {
						pins = "gpio70", "gpio71", "gpio72";
						drive-strength = <0x8>;
					};
				};

				pdm_lines_2_off {
					phandle = <0x11c>;

					mux {
						pins = "gpio70", "gpio71", "gpio72";
						function = "cdc_pdm0";
					};

					config {
						pins = "gpio70", "gpio71", "gpio72";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			cdc-pdm-lines {

				pdm_lines_on {
					phandle = <0x119>;

					mux {
						pins = "gpio69", "gpio73", "gpio74";
						function = "cdc_pdm0";
					};

					config {
						pins = "gpio69", "gpio73", "gpio74";
						drive-strength = <0x8>;
					};
				};

				pdm_lines_off {
					phandle = <0x11b>;

					mux {
						pins = "gpio69", "gpio73", "gpio74";
						function = "cdc_pdm0";
					};

					config {
						pins = "gpio69", "gpio73", "gpio74";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			cross-conn-det {

				lines_on {
					phandle = <0x117>;

					mux {
						pins = "gpio63";
						function = "gpio";
					};

					config {
						pins = "gpio63";
						drive-strength = <0x8>;
						output-low;
						bias-pull-down;
					};
				};

				lines_off {
					phandle = <0x118>;

					mux {
						pins = "gpio63";
						function = "gpio";
					};

					config {
						pins = "gpio63";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			wsa-vi {

				wsa_vi_on {
					phandle = <0x179>;

					mux {
						pins = "gpio94", "gpio95";
						function = "wsa_io";
					};

					config {
						pins = "gpio94", "gpio95";
						drive-strength = <0x8>;
						bias-disable;
					};
				};

				wsa_vi_off {
					phandle = <0x17a>;

					mux {
						pins = "gpio94", "gpio95";
						function = "wsa_io";
					};

					config {
						pins = "gpio94", "gpio95";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			wsa_reset {

				wsa_reset_on {
					phandle = <0x17b>;

					mux {
						pins = "gpio96";
						function = "gpio";
					};

					config {
						pins = "gpio96";
						drive-strength = <0x2>;
						output-high;
					};
				};

				wsa_reset_off {
					phandle = <0x17c>;

					mux {
						pins = "gpio96";
						function = "gpio";
					};

					config {
						pins = "gpio96";
						drive-strength = <0x2>;
						output-low;
					};
				};
			};

			wsa_clk {

				wsa_clk_on {
					phandle = <0x17d>;

					mux {
						pins = "gpio25";
						function = "pri_mi2s_mclk_a";
					};

					config {
						pins = "gpio25";
						drive-strength = <0x8>;
						output-high;
					};
				};

				wsa_clk_off {
					phandle = <0x17e>;

					mux {
						pins = "gpio25";
						function = "pri_mi2s_mclk_a";
					};

					config {
						pins = "gpio25";
						drive-strength = <0x2>;
						output-low;
						bias-pull-down;
					};
				};
			};

			pri-tlmm-lines {

				pri_tlmm_lines_act {
					phandle = <0x11d>;

					mux {
						pins = "gpio85", "gpio88";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio85", "gpio88";
						drive-strength = <0x8>;
					};
				};

				pri_tlmm_lines_sus {
					phandle = <0x11f>;

					mux {
						pins = "gpio85", "gpio88";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio85", "gpio88";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};
			};

			pri-tlmm-ws-lines {

				pri_tlmm_ws_act {
					phandle = <0x11e>;

					mux {
						pins = "gpio87";
						function = "pri_mi2s_ws";
					};

					config {
						pins = "gpio87";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};

				pri_tlmm_ws_sus {
					phandle = <0x120>;

					mux {
						pins = "gpio87";
						function = "pri_mi2s_ws";
					};

					config {
						pins = "gpio87";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};
			};

			spi3 {

				spi3_default {
					phandle = <0xbf>;

					mux {
						pins = "gpio8", "gpio9", "gpio11";
						function = "blsp_spi3";
					};

					config {
						pins = "gpio8", "gpio9", "gpio11";
						drive-strength = <0xc>;
						bias-disable = <0x0>;
					};
				};

				spi3_sleep {
					phandle = <0xc1>;

					mux {
						pins = "gpio8", "gpio9", "gpio11";
						function = "gpio";
					};

					config {
						pins = "gpio8", "gpio9", "gpio11";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				cs0_active {
					phandle = <0xc0>;

					mux {
						pins = "gpio10";
						function = "blsp_spi3";
					};

					config {
						pins = "gpio10";
						drive-strength = <0x2>;
						bias-disable = <0x0>;
					};
				};

				cs0_sleep {
					phandle = <0xc2>;

					mux {
						pins = "gpio10";
						function = "gpio";
					};

					config {
						pins = "gpio10";
						drive-strength = <0x2>;
						bias-disable = <0x0>;
					};
				};
			};

			spi6 {

				spi6_default {
					phandle = <0xdc>;

					mux {
						pins = "gpio20", "gpio21", "gpio23";
						function = "blsp_spi6";
					};

					config {
						pins = "gpio20", "gpio21", "gpio23";
						drive-strength = <0x10>;
						bias-disable = <0x0>;
					};
				};

				spi6_sleep {
					phandle = <0xde>;

					mux {
						pins = "gpio20", "gpio21", "gpio23";
						function = "gpio";
					};

					config {
						pins = "gpio20", "gpio21", "gpio23";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				cs0_active {
					phandle = <0xdd>;

					mux {
						pins = "gpio47";
						function = "blsp6_spi";
					};

					config {
						pins = "gpio47";
						drive-strength = <0x10>;
						bias-disable = <0x0>;
					};
				};

				cs0_sleep {
					phandle = <0xdf>;

					mux {
						pins = "gpio47";
						function = "gpio";
					};

					config {
						pins = "gpio47";
						drive-strength = <0x2>;
						bias-disable = <0x0>;
					};
				};

				cs1_active {
					phandle = <0x17f>;

					mux {
						pins = "gpio22";
						function = "blsp_spi6";
					};

					config {
						pins = "gpio22";
						drive-strength = <0x10>;
						bias-disable = <0x0>;
					};
				};

				cs1_sleep {
					phandle = <0x180>;

					mux {
						pins = "gpio22";
						function = "gpio";
					};

					config {
						pins = "gpio22";
						drive-strength = <0x2>;
						bias-disable = <0x0>;
					};
				};
			};

			fpc_reset_int {

				reset_low {
					phandle = <0x181>;

					mux {
						pins = "gpio124";
						function = "fpc_reset_gpio_low";
					};

					config {
						pins = "gpio124";
						drive-strength = <0x2>;
						bias-disable;
						output-low;
					};
				};

				reset_high {
					phandle = <0x182>;

					mux {
						pins = "gpio124";
						function = "fpc_reset_gpio_high";
					};

					config {
						pins = "gpio124";
						drive-strength = <0x2>;
						bias-disable;
						output-high;
					};
				};

				int_low {
					phandle = <0x183>;

					mux {
						pins = "gpio48";
					};

					config {
						pins = "gpio48";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};
			};

			i2c_2 {

				i2c_2_active {
					phandle = <0xb8>;

					mux {
						pins = "gpio6", "gpio7";
						function = "blsp_i2c2";
					};

					config {
						pins = "gpio6", "gpio7";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				i2c_2_sleep {
					phandle = <0xb9>;

					mux {
						pins = "gpio6", "gpio7";
						function = "gpio";
					};

					config {
						pins = "gpio6", "gpio7";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			i2c_3 {

				i2c_3_active {
					phandle = <0xba>;

					mux {
						pins = "gpio10", "gpio11";
						function = "blsp_i2c3";
					};

					config {
						pins = "gpio10", "gpio11";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				i2c_3_sleep {
					phandle = <0xbb>;

					mux {
						pins = "gpio10", "gpio11";
						function = "gpio";
					};

					config {
						pins = "gpio10", "gpio11";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			i2c_4 {

				i2c_4_active {
					phandle = <0xaf>;

					mux {
						pins = "gpio14", "gpio15";
						function = "blsp_i2c4";
					};

					config {
						pins = "gpio14", "gpio15";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				i2c_4_sleep {
					phandle = <0xb0>;
					mux {
						pins = "gpio14", "gpio15";
						function = "gpio";
					};

					config {
						pins = "gpio14", "gpio15";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			i2c_5 {

				i2c_5_active {
					phandle = <0xbc>;

					mux {
						pins = "gpio18", "gpio19";
						function = "blsp_i2c5";
					};

					config {
						pins = "gpio18", "gpio19";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				i2c_5_sleep {
					phandle = <0xbd>;

					mux {
						pins = "gpio18", "gpio19";
						function = "gpio";
					};

					config {
						pins = "gpio18", "gpio19";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			i2c_6 {

				i2c_6_active {
					phandle = <0x184>;

					mux {
						pins = "gpio22", "gpio23";
						function = "blsp_i2c6";
					};

					config {
						pins = "gpio22", "gpio23";
						drive-strength = <0x2>;
						bias-disable;
					};
				};

				i2c_6_sleep {
					phandle = <0x185>;

					mux {
						pins = "gpio22", "gpio23";
						function = "gpio";
					};

					config {
						pins = "gpio22", "gpio23";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			nfc {

				nfc_int_active {
					phandle = <0x186>;

					mux {
						pins = "gpio17";
						function = "gpio";
					};

					config {
						pins = "gpio17";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};

				nfc_int_suspend {
					phandle = <0x187>;

					mux {
						pins = "gpio17";
						function = "gpio";
					};

					config {
						pins = "gpio17";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};

				nfc_disable_active {
					phandle = <0x188>;

					mux {
						pins = "gpio16", "gpio130";
						function = "gpio";
					};

					config {
						pins = "gpio16", "gpio130";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};

				nfc_disable_suspend {
					phandle = <0x189>;

					mux {
						pins = "gpio16", "gpio130";
						function = "gpio";
					};

					config {
						pins = "gpio16", "gpio130";
						drive-strength = <0x2>;
						bias-disable;
					};
				};
			};

			tlmm_gpio_key {

				gpio_key_active {
					phandle = <0x18a>;

					mux {
						pins = "gpio91", "gpio127", "gpio128";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};

				gpio_key_suspend {
					phandle = <0x18b>;

					mux {
						pins = "gpio91", "gpio127", "gpio128";
						drive-strength = <0x2>;
						bias-pull-up;
					};
				};
			};

			tlmm_pmi_flash_led {

				rear_flash_led_enable {
					phandle = <0x18c>;

					mux {
						pins = "gpio33";
						function = "gpio";
					};

					config {
						pins = "gpio33";
						drive-strength = <0x10>;
						output-high;
					};
				};

				rear_flash_led_disable {
					phandle = <0x18d>;

					mux {
						pins = "gpio33";
						function = "gpio";
					};

					config {
						pins = "gpio33";
						drive-strength = <0x2>;
						output-low;
					};
				};

				front_flash_led_enable {
					phandle = <0x18e>;

					mux {
						pins = "gpio50";
						function = "gpio";
					};

					config {
						pins = "gpio50";
						drive-strength = <0x10>;
						output-high;
					};
				};

				front_flash_led_disable {
					phandle = <0x18f>;

					mux {
						pins = "gpio50";
						function = "gpio";
					};

					config {
						pins = "gpio50";
						drive-strength = <0x2>;
						output-low;
					};
				};
			};

			usbc_int_default {
				phandle = <0x190>;

				mux {
					pins = "gpio97", "gpio131";
					function = "gpio";
				};

				config {
					pins = "gpio97", "gpio131";
					drive-strength = <0x2>;
					bias-pull-up;
				};
			};

			pri_mi2s_sck {

				pri_mi2s_sck_sleep {
					phandle = <0x191>;

					mux {
						pins = "gpio85";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio85";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sck_active {
					phandle = <0x192>;

					mux {
						pins = "gpio85";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio85";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};
			};

			pri_mi2s_sd0 {
				pri_mi2s_sd0_sleep {
					phandle = <0x193>;

					mux {
						pins = "gpio88";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio88";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sd0_active {
					phandle = <0x194>;

					mux {
						pins = "gpio88";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio88";
						drive-strength = <0x10>;
						bias-disable;
					};
				};
			};

			pri_mi2s_sd1 {

				pri_mi2s_sd1_sleep {
					phandle = <0x195>;

					mux {
						pins = "gpio86";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio86";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};

				pri_mi2s_sd1_active {
					phandle = <0x196>;

					mux {
						pins = "gpio86";
						function = "pri_mi2s";
					};

					config {
						pins = "gpio86";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_ws {

				sec_mi2s_ws_sleep {
					phandle = <0x197>;

					mux {
						pins = "gpio95";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio95";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				sec_mi2s_ws_active {
					phandle = <0x198>;

					mux {
						pins = "gpio95";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio95";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_sck {

				sec_mi2s_sck_sleep {
					phandle = <0x199>;

					mux {
						pins = "gpio94";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio94";
						drive-strength = <0x2>;
						bias-pull-down;
					};
				};

				sec_mi2s_sck_active {
					phandle = <0x19a>;

					mux {
						pins = "gpio94";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio94";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_sd0 {

				sec_mi2s_sd0_sleep {
					phandle = <0x19b>;
					mux {
						pins = "gpio12";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio12";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_sd0_active {
					phandle = <0x19c>;

					mux {
						pins = "gpio12";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio12";
						drive-strength = <0x10>;
						bias-disable;
						output-high;
					};
				};
			};

			sec_mi2s_sd1 {

				sec_mi2s_sd1_sleep {
					phandle = <0x19d>;

					mux {
						pins = "gpio13";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio13";
						drive-strength = <0x2>;
						bias-pull-down;
						input-enable;
					};
				};

				sec_mi2s_sd1_active {
					phandle = <0x19e>;

					mux {
						pins = "gpio13";
						function = "sec_mi2s";
					};

					config {
						pins = "gpio13";
						drive-strength = <0x10>;
						bias-disable;
					};
				};
			};

			usb_mode_select {
				phandle = <0x19f>;

				mux {
					pins = "gpio130";
					function = "gpio";
				};

				config {
					pins = "gpio130";
					drive-strength = <0x2>;
					bias-disable;
					input-enable;
				};
			};

			usb2533_hub_reset {
				phandle = <0x1a0>;

				mux {
					pins = "gpio100";
					function = "gpio";
				};

				config {
					pins = "gpio100";
					drive-strength = <0x2>;
					output-low;
				};
			};
		};

		qcom,msm-cam@1b00000 {
			compatible = "qcom,msm-cam";
			reg = <0x1b00000 0x40000>;
			reg-names = "msm-cam";
			status = "ok";
			bus-vectors = "suspend", "svs", "nominal", "turbo";
			qcom,bus-votes = <0x0 0x9896800 0x1312d000 0x1312d000>;
		};

		qcom,csiphy@1b34000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
			reg = <0x1b34000 0x1000 0x1b00030 0x4>;
			reg-names = "csiphy", "csiphy_clk_mux";
			interrupts = <0x0 0x4e 0x0>;
			interrupt-names = "csiphy";
			clocks = <0xa 0x4e814a78 0xa 0x3c0a858f 0xa 0xc8a309be 0xa 0xf8897589 0xa 0xf92304fb 0xa 0x6a41ff7 0xa 0x9894b414>;
			clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>;
		};

		qcom,csiphy@1b35000 {
			status = "ok";
			cell-index = <0x1>;
			compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
			reg = <0x1b35000 0x1000 0x1b00038 0x4>;
			reg-names = "csiphy", "csiphy_clk_mux";
			interrupts = <0x0 0x4f 0x0>;
			interrupt-names = "csiphy";
			clocks = <0xa 0x4e814a78 0xa 0x3c0a858f 0xa 0x7c0fe23a 0xa 0x4d26438f 0xa 0xf92304fb 0xa 0xfd1d1fa 0xa 0x9894b414>;
			clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>;
		};

		qcom,csid@1b30000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,csid-v3.4.3", "qcom,csid";
			reg = <0x1b30000 0x400>;
			reg-names = "csid";
			interrupts = <0x0 0x33 0x0>;
			interrupt-names = "csid";
			qcom,csi-vdd-voltage = <0x109a00>;
			qcom,mipi-csi-vdd-supply = <0xb>;
			clocks = <0xa 0x4e814a78 0xa 0x3c0a858f 0xa 0x175d672a 0xa 0x227e65bc 0xa 0x6b01b3e1 0xa 0x61a8a930 0xa 0x7053c7ae 0xa 0x9894b414>;
			clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>;
		};

		qcom,csid@1b30400 {
			status = "ok";
			cell-index = <0x1>;
			compatible = "qcom,csid-v3.4.3", "qcom,csid";
			reg = <0x1b30400 0x400>;
			reg-names = "csid";
			interrupts = <0x0 0x34 0x0>;
			interrupt-names = "csid";
			qcom,csi-vdd-voltage = <0x109a00>;
			qcom,mipi-csi-vdd-supply = <0xb>;
			clocks = <0xa 0x4e814a78 0xa 0x3c0a858f 0xa 0x2c2dc261 0xa 0x6a2a6c36 0xa 0x1aba4a8c 0xa 0x87fc98d8 0xa 0x6ac996fe 0xa 0x9894b414>;
			clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>;
		};

		qcom,csid@1b30800 {
			status = "ok";
			cell-index = <0x2>;
			compatible = "qcom,csid-v3.4.3", "qcom,csid";
			reg = <0x1b30800 0x400>;
			reg-names = "csid";
			interrupts = <0x0 0x99 0x0>;
			interrupt-names = "csid";
			qcom,csi-vdd-voltage = <0x109a00>;
			qcom,mipi-csi-vdd-supply = <0xb>;
			clocks = <0xa 0x4e814a78 0xa 0x3c0a858f 0xa 0xf3f25940 0xa 0x4113589f 0xa 0xb6857fa2 0xa 0xa619561a 0xa 0x19fd3f1 0xa 0x9894b414>;
			clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>;
		};

		qcom,ispif@1b31000 {
			cell-index = <0x0>;
			compatible = "qcom,ispif-v3.0", "qcom,ispif";
			reg = <0x1b31000 0x500 0x1b00020 0x10>;
			reg-names = "ispif", "csi_clk_mux";
			interrupts = <0x0 0x37 0x0>;
			interrupt-names = "ispif";
			qcom,num-isps = <0x2>;
			vfe0-vdd-supply = <0xc>;
			vfe1-vdd-supply = <0xd>;
			qcom,vdd-names = "vfe0-vdd", "vfe1-vdd";
			clocks = <0xa 0x3c0a858f 0xa 0x9894b414 0xa 0x4e814a78 0xa 0xf92304fb 0xa 0x227e65bc 0xa 0x6b01b3e1 0xa 0x7053c7ae 0xa 0x61a8a930 0xa 0x6a2a6c36 0xa 0x1aba4a8c 0xa 0x6ac996fe 0xa 0x87fc98d8 0xa 0x4113589f 0xa 0xb6857fa2 0xa 0x19fd3f1 0xa 0xa619561a 0xa 0xa0c2bd8f 0xa 0xaaa3cd97 0xa 0xcc73453c 0xa 0x4e357366 0xa 0xcaf20d99 0xa 0xb1ef6e8b>;
			clock-names = "ispif_ahb_clk", "camss_ahb_clk", "camss_top_ahb_clk", "camss_ahb_src", "csi0_src_clk", "csi0_clk", "csi0_rdi_clk", "csi0_pix_clk", "csi1_src_clk", "csi1_clk", "csi1_rdi_clk", "csi1_pix_clk", "csi2_src_clk", "csi2_clk", "csi2_rdi_clk", "csi2_pix_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk", "vfe1_clk_src", "camss_vfe_vfe1_clk", "camss_csi_vfe1_clk";
			qcom,clock-rates = <0x3ab06a0 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
			qcom,clock-cntl-support;
			qcom,clock-control = "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE";
		};

		qcom,vfe0@1b10000 {
			cell-index = <0x0>;
			compatible = "qcom,vfe40";
			reg = <0x1b10000 0x1000 0x1b40000 0x200>;
			reg-names = "vfe", "vfe_vbif";
			interrupts = <0x0 0x39 0x0>;
			interrupt-names = "vfe";
			vdd-supply = <0xc>;
			clocks = <0xa 0x4e814a78 0xa 0x9894b414 0xa 0xa0c2bd8f 0xa 0xaaa3cd97 0xa 0xcc73453c 0xa 0x4050f47a 0xa 0x77fe2384 0xa 0x3c0a858f>;
			clock-names = "camss_top_ahb_clk", "camss_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "iface_ahb_clk";
			qcom,clock-rates = <0x0 0x0 0xfe50fb0 0x0 0x0 0x0 0x0 0x0>;
			qos-entries = <0x8>;
			qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>;
			qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>;
			vbif-entries = <0x1>;
			vbif-regs = <0x124>;
			vbif-settings = <0x3>;
			ds-entries = <0x11>;
			ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>;
			ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>;
			max-clk-nominal = <0x17d78400>;
			max-clk-turbo = <0x19bfcc00>;
			phandle = <0x1a1>;
		};

		qcom,vfe1@1b14000 {
			cell-index = <0x1>;
			compatible = "qcom,vfe40";
			reg = <0x1b14000 0x1000 0x1ba0000 0x200>;
			reg-names = "vfe", "vfe_vbif";
			interrupts = <0x0 0x1d 0x0>;
			interrupt-names = "vfe";
			vdd-supply = <0xd>;
			clocks = <0xa 0x4e814a78 0xa 0x9894b414 0xa 0x4e357366 0xa 0xcaf20d99 0xa 0xb1ef6e8b 0xa 0x634a738a 0xa 0xaf7463b3 0xa 0x3c0a858f>;
			clock-names = "camss_top_ahb_clk", "camss_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "iface_ahb_clk";
			qcom,clock-rates = <0x0 0x0 0xfe50fb0 0x0 0x0 0x0 0x0 0x0>;
			qos-entries = <0x8>;
			qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>;
			qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>;
			vbif-entries = <0x1>;
			vbif-regs = <0x124>;
			vbif-settings = <0x3>;
			ds-entries = <0x11>;
			ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>;
			ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>;
			max-clk-nominal = <0x17d78400>;
			max-clk-turbo = <0x19bfcc00>;
			phandle = <0x1a2>;
		};

		qcom,vfe {
			compatible = "qcom,vfe";
			num_child = <0x2>;
		};

		qcom,cam_smmu {
			status = "ok";
			compatible = "qcom,msm-cam-smmu";

			msm_cam_smmu_cb1 {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = <0xe 0x400 0x0 0xe 0x2400 0x0>;
				label = "vfe";
				qcom,scratch-buf-support;
				phandle = <0x1a3>;
			};

			msm_cam_smmu_cb2 {
				compatible = "qcom,msm-cam-smmu-cb";
				label = "vfe_secure";
				qcom,secure-context;
				phandle = <0x1a4>;
			};

			msm_cam_smmu_cb3 {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = <0xe 0x1c00 0x0>;
				label = "cpp";
				phandle = <0x1a5>;
			};

			msm_cam_smmu_cb4 {
				compatible = "qcom,msm-cam-smmu-cb";
				iommus = <0xe 0x1800 0x0>;
				label = "jpeg_enc0";
				phandle = <0x1a6>;
			};
		};

		qcom,jpeg@1b1c000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,jpeg";
			reg = <0x1b1c000 0x400 0x1b60000 0xc30>;
			reg-names = "jpeg_hw", "jpeg_vbif";
			interrupts = <0x0 0x3b 0x0>;
			interrupt-names = "jpeg";
			vdd-supply = <0xf>;
			qcom,vdd-names = "vdd";
			clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk";
			clocks = <0xa 0x1ed3f032 0xa 0x3bfa7603 0xa 0x3e278896 0xa 0x4e814a78 0xa 0x9894b414>;
			qcom,clock-rates = <0xfe50fb0 0x0 0x0 0x0 0x0>;
			qcom,qos-reg-settings = <0x28 0x555e 0xc8 0x5555>;
			qcom,msm-bus,name = "msm_camera_jpeg0";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x0 0x0 0x3e 0x200 0xc3500 0xc3500>;
			qcom,vbif-reg-settings = <0xc0 0x10101000 0xb0 0x10100010>;
		};

		qcom,irqrouter@1b00000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,irqrouter";
			reg = <0x1b00000 0x100>;
			reg-names = "irqrouter";
		};

		qcom,cpp@1b04000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,cpp";
			reg = <0x1b04000 0x100 0x1b80000 0x200 0x1b18000 0x18 0x1858078 0x4>;
			reg-names = "cpp", "cpp_vbif", "cpp_hw", "camss_cpp";
			interrupts = <0x0 0x31 0x0>;
			interrupt-names = "cpp";
			vdd-supply = <0x10>;
			qcom,vdd-names = "vdd";
			clocks = <0xa 0x3c0a858f 0xa 0x8382f56d 0xa 0x4e814a78 0xa 0x4ac95e14 0xa 0xbbf73861 0xa 0x7118a0de 0xa 0xfbbee8cf 0xa 0x9894b414>;
			clock-names = "ispif_ahb_clk", "cpp_core_clk", "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk";
			qcom,clock-rates = <0x3ab06a0 0xaba9500 0x0 0x0 0x0 0xaba9500 0x0 0x0>;
			qcom,min-clock-rate = <0x7ed6b40>;
			resets = <0xa 0x0>;
			reset-names = "micro_iface_reset";
			qcom,bus-master = <0x1>;
			qcom,msm-bus,name = "msm_camera_cpp";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x6a 0x200 0x0 0x0 0x6a 0x200 0x0 0x0>;
			qcom,msm-bus-vector-dyn-vote;
			qcom,micro-reset;

			qcom,cpp-fw-payload-info {
				qcom,stripe-base = <0x9c>;
				qcom,plane-base = <0x8d>;
				qcom,stripe-size = <0x1b>;
				qcom,plane-size = <0x5>;
				qcom,fe-ptr-off = <0x5>;
				qcom,we-ptr-off = <0xb>;
			};
		};

		qcom,cci@1b0c000 {
			status = "ok";
			cell-index = <0x0>;
			compatible = "qcom,cci";
			reg = <0x1b0c000 0x4000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "cci";
			interrupts = <0x0 0x32 0x0>;
			interrupt-names = "cci";
			clocks = <0xa 0x3c0a858f 0xa 0x822f3d97 0xa 0xa81c11ba 0xa 0xb7dd8824 0xa 0x9894b414 0xa 0x4e814a78>;
			clock-names = "ispif_ahb_clk", "cci_src_clk", "cci_ahb_clk", "camss_cci_clk", "camss_ahb_clk", "camss_top_ahb_clk";
			qcom,clock-rates = <0x3ab06a0 0x124f800 0x0 0x0 0x0 0x0 0x3ab06a0 0x23c3460 0x0 0x0 0x0 0x0>;
			pinctrl-names = "cci_default", "cci_suspend";
			pinctrl-0 = <0x11 0x12>;
			pinctrl-1 = <0x13 0x14>;
			gpios = <0x15 0x1d 0x0 0x15 0x1e 0x0 0x15 0x1f 0x0 0x15 0x20 0x0>;
			qcom,gpio-tbl-num = <0x0 0x1 0x2 0x3>;
			qcom,gpio-tbl-flags = <0x1 0x1 0x1 0x1>;
			qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0", "CCI_I2C_DATA1", "CCI_I2C_CLK1";
			phandle = <0x1a7>;

			qcom,i2c_standard_mode {
				status = "disabled";
				qcom,hw-thigh = <0x4e>;
				qcom,hw-tlow = <0x72>;
				qcom,hw-tsu-sto = <0x1c>;
				qcom,hw-tsu-sta = <0x1c>;
				qcom,hw-thd-dat = <0xa>;
				qcom,hw-thd-sta = <0x4d>;
				qcom,hw-tbuf = <0x76>;
				qcom,hw-scl-stretch-en = <0x0>;
				qcom,hw-trdhld = <0x6>;
				qcom,hw-tsp = <0x1>;
				phandle = <0x1a8>;
			};

			qcom,i2c_fast_mode {
				status = "ok";
				qcom,hw-thigh = <0x14>;
				qcom,hw-tlow = <0x1c>;
				qcom,hw-tsu-sto = <0x15>;
				qcom,hw-tsu-sta = <0x15>;
				qcom,hw-thd-dat = <0xd>;
				qcom,hw-thd-sta = <0x12>;
				qcom,hw-tbuf = <0x20>;
				qcom,hw-scl-stretch-en = <0x0>;
				qcom,hw-trdhld = <0x6>;
				qcom,hw-tsp = <0x3>;
				phandle = <0x1a9>;
			};

			qcom,i2c_custom_mode {
				status = "ok";
				qcom,hw-thigh = <0xf>;
				qcom,hw-tlow = <0x1c>;
				qcom,hw-tsu-sto = <0x15>;
				qcom,hw-tsu-sta = <0x15>;
				qcom,hw-thd-dat = <0xd>;
				qcom,hw-thd-sta = <0x12>;
				qcom,hw-tbuf = <0x19>;
				qcom,hw-scl-stretch-en = <0x1>;
				qcom,hw-trdhld = <0x6>;
				qcom,hw-tsp = <0x3>;
				phandle = <0x1aa>;
			};

			qcom,i2c_fast_plus_mode {
				status = "ok";
				qcom,hw-thigh = <0x10>;
				qcom,hw-tlow = <0x16>;
				qcom,hw-tsu-sto = <0x11>;
				qcom,hw-tsu-sta = <0x12>;
				qcom,hw-thd-dat = <0x10>;
				qcom,hw-thd-sta = <0xf>;
				qcom,hw-tbuf = <0x13>;
				qcom,hw-scl-stretch-en = <0x1>;
				qcom,hw-trdhld = <0x3>;
				qcom,hw-tsp = <0x3>;
				qcom,cci-clk-src = <0x23c3460>;
				phandle = <0x1ab>;
			};
		};

		cpuss_dump {
			compatible = "qcom,cpuss-dump";

			qcom,l2_dump1 {
				qcom,dump-node = <0x8>;
				qcom,dump-id = <0xc1>;
			};

			qcom,l1_i_cache100 {
				qcom,dump-node = <0x16>;
				qcom,dump-id = <0x60>;
			};

			qcom,l1_i_cache101 {
				qcom,dump-node = <0x17>;
				qcom,dump-id = <0x61>;
			};

			qcom,l1_i_cache102 {
				qcom,dump-node = <0x18>;
				qcom,dump-id = <0x62>;
			};

			qcom,l1_i_cache103 {
				qcom,dump-node = <0x19>;
				qcom,dump-id = <0x63>;
			};

			qcom,l1_d_cache100 {
				qcom,dump-node = <0x1a>;
				qcom,dump-id = <0x80>;
			};

			qcom,l1_d_cache101 {
				qcom,dump-node = <0x1b>;
				qcom,dump-id = <0x81>;
			};

			qcom,l1_d_cache102 {
				qcom,dump-node = <0x1c>;
				qcom,dump-id = <0x82>;
			};

			qcom,l1_d_cache103 {
				qcom,dump-node = <0x1d>;
				qcom,dump-id = <0x83>;
			};
		};

		qcom,spm@b012000 {
			compatible = "qcom,spm-v2";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0xb012000 0x1000>;
			qcom,name = "perf-l2";
			qcom,saw2-ver-reg = <0xfd0>;
			qcom,saw2-cfg = <0x14>;
			qcom,saw2-spm-dly = <0x3c11840a>;
			qcom,saw2-spm-ctl = <0xe>;
			qcom,cpu-vctl-list = <0x2 0x3 0x4 0x5>;
			qcom,vctl-timeout-us = <0x1f4>;
			qcom,vctl-port = <0x0>;
		};

		qcom,lpm-levels {
			compatible = "qcom,lpm-levels";
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			qcom,pm-cluster@0 {
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				label = "perf";
				qcom,psci-mode-shift = <0x4>;
				qcom,psci-mode-mask = <0xf>;

				qcom,pm-cluster-level@0 {
					reg = <0x0>;
					label = "perf-l2-wfi";
					qcom,psci-mode = <0x1>;
					qcom,latency-us = <0xb4>;
					qcom,ss-power = <0x1ad>;
					qcom,energy-overhead = <0x27caf>;
					qcom,time-overhead = <0x131>;
				};

				qcom,pm-cluster-level@1 {
					reg = <0x1>;
					label = "perf-l2-gdhs";
					qcom,psci-mode = <0x4>;
					qcom,latency-us = <0x118>;
					qcom,ss-power = <0x1a5>;
					qcom,energy-overhead = <0x3ede6>;
					qcom,time-overhead = <0x208>;
					qcom,min-child-idx = <0x1>;
					qcom,reset-level = <0x2>;
				};

				qcom,pm-cluster-level@2 {
					reg = <0x2>;
					label = "perf-l2-retention";
					qcom,psci-mode = <0x2>;
					qcom,latency-us = <0x28a>;
					qcom,ss-power = <0x15e>;
					qcom,energy-overhead = <0x9ef35>;
					qcom,time-overhead = <0x546>;
					qcom,min-child-idx = <0x1>;
					qcom,reset-level = <0x1>;
				};

				qcom,pm-cluster-level@3 {
					reg = <0x3>;
					label = "perf-l2-pc";
					qcom,psci-mode = <0x5>;
					qcom,latency-us = <0x2bc0>;
					qcom,ss-power = <0x140>;
					qcom,energy-overhead = <0xe0039>;
					qcom,time-overhead = <0x6a4>;
					qcom,min-child-idx = <0x1>;
					qcom,is-reset;
					qcom,notify-rpm;
					qcom,reset-level = <0x3>;
				};

				qcom,pm-cpu {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					qcom,psci-mode-shift = <0x0>;
					qcom,psci-mode-mask = <0xf>;
					qcom,cpu = <0x2 0x3 0x4 0x5>;

					qcom,pm-cpu-level@0 {
						reg = <0x0>;
						label = "wfi";
						qcom,psci-cpu-mode = <0x1>;
						qcom,latency-us = <0xc>;
						qcom,ss-power = <0x1cf>;
						qcom,energy-overhead = <0x5be0>;
						qcom,time-overhead = <0x19>;
					};

					qcom,pm-cpu-level@1 {
						reg = <0x1>;
						label = "pc";
						qcom,psci-cpu-mode = <0x3>;
						qcom,latency-us = <0xb4>;
						qcom,ss-power = <0x1ad>;
						qcom,energy-overhead = <0x27caf>;
						qcom,time-overhead = <0x131>;
						qcom,use-broadcast-timer;
						qcom,is-reset;
						qcom,reset-level = <0x3>;
					};
				};
			};
		};

		qcom,rpm-stats@29dba0 {
			compatible = "qcom,rpm-stats";
			reg = <0x200000 0x1000 0x290014 0x4>;
			reg-names = "phys_addr_base", "offset_addr";
		};

		qcom,rpm-master-stats@60150 {
			compatible = "qcom,rpm-master-stats";
			reg = <0x60150 0x5000>;
			qcom,masters = "APSS", "MPSS", "PRONTO", "TZ", "LPASS";
			qcom,master-stats-version = <0x2>;
			qcom,master-offset = <0x1000>;
		};

		qcom,ion {
			compatible = "qcom,msm-ion";
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			qcom,ion-heap@25 {
				reg = <0x19>;
				qcom,ion-heap-type = "SYSTEM";
			};

			qcom,ion-heap@8 {
				reg = <0x8>;
				memory-region = <0x1e>;
				qcom,ion-heap-type = "SECURE_DMA";
			};

			qcom,ion-heap@27 {
				reg = <0x1b>;
				memory-region = <0x1f>;
				qcom,ion-heap-type = "DMA";
			};

			qcom,ion-heap@19 {
				reg = <0x13>;
				memory-region = <0x20>;
				qcom,ion-heap-type = "DMA";
			};
		};

		qcom,smp2p-modem@b011008 {
			compatible = "qcom,smp2p";
			reg = <0xb011008 0x4>;
			qcom,remote-pid = <0x1>;
			qcom,irq-bitmask = <0x4000>;
			interrupts = <0x0 0x1b 0x1>;
		};

		qcom,smp2p-wcnss@b011008 {
			compatible = "qcom,smp2p";
			reg = <0xb011008 0x4>;
			qcom,remote-pid = <0x4>;
			qcom,irq-bitmask = <0x40000>;
			interrupts = <0x0 0x8f 0x1>;
		};

		qcom,smp2p-adsp@b011008 {
			compatible = "qcom,smp2p";
			reg = <0xb011008 0x4>;
			qcom,remote-pid = <0x2>;
			qcom,irq-bitmask = <0x400>;
			interrupts = <0x0 0x123 0x1>;
		};

		qcom,smp2pgpio-smp2p-15-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0xf>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x21>;
		};

		qcom,smp2pgpio_test_smp2p_15_in {
			compatible = "qcom,smp2pgpio_test_smp2p_15_in";
			gpios = <0x21 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-15-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0xf>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x22>;
		};

		qcom,smp2pgpio_test_smp2p_15_out {
			compatible = "qcom,smp2pgpio_test_smp2p_15_out";
			gpios = <0x22 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-1-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x1>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x23>;
		};
		qcom,smp2pgpio_test_smp2p_1_in {
			compatible = "qcom,smp2pgpio_test_smp2p_1_in";
			gpios = <0x23 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-1-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x1>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x24>;
		};

		qcom,smp2pgpio_test_smp2p_1_out {
			compatible = "qcom,smp2pgpio_test_smp2p_1_out";
			gpios = <0x24 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-4-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x4>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x25>;
		};

		qcom,smp2pgpio_test_smp2p_4_in {
			compatible = "qcom,smp2pgpio_test_smp2p_4_in";
			gpios = <0x25 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-4-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x26>;
		};

		qcom,smp2pgpio_test_smp2p_4_out {
			compatible = "qcom,smp2pgpio_test_smp2p_4_out";
			gpios = <0x26 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-2-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x2>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x27>;
		};

		qcom,smp2pgpio_test_smp2p_2_in {
			compatible = "qcom,smp2pgpio_test_smp2p_2_in";
			gpios = <0x27 0x0 0x0>;
		};

		qcom,smp2pgpio-smp2p-2-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "smp2p";
			qcom,remote-pid = <0x2>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x28>;
		};

		qcom,smp2pgpio_test_smp2p_2_out {
			compatible = "qcom,smp2pgpio_test_smp2p_2_out";
			gpios = <0x28 0x0 0x0>;
		};

		qcom,smp2pgpio-ssr-smp2p-1-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "slave-kernel";
			qcom,remote-pid = <0x1>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd0>;
		};

		qcom,smp2pgpio-ssr-smp2p-1-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "master-kernel";
			qcom,remote-pid = <0x1>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd1>;
		};

		qcom,smp2pgpio-ssr-smp2p-2-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "slave-kernel";
			qcom,remote-pid = <0x2>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd4>;
		};

		qcom,smp2pgpio-ssr-smp2p-2-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "master-kernel";
			qcom,remote-pid = <0x2>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd5>;
		};

		qcom,smp2pgpio-ssr-smp2p-4-in {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "slave-kernel";
			qcom,remote-pid = <0x4>;
			qcom,is-inbound;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd7>;
		};

		qcom,smp2pgpio-ssr-smp2p-4-out {
			compatible = "qcom,smp2pgpio";
			qcom,entry-name = "master-kernel";
			qcom,remote-pid = <0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xd8>;
		};

		tmc@6028000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b961>;
			reg = <0x6028000 0x1000 0x6044000 0x15000>;
			reg-names = "tmc-base", "bam-base";
			interrupts = <0x0 0xa6 0x0>;
			interrupt-names = "byte-cntr-irq";
			arm,buffer-size = <0x100000>;
			arm,sg-enable;
			qcom,force-reg-dump;
			coresight-name = "coresight-tmc-etr";
			coresight-csr = <0x29>;
			coresight-ctis = <0x2a 0x2b>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ac>;

			port {

				endpoint {
					slave-mode;
					remote-endpoint = <0x2c>;
					phandle = <0x2f>;
				};
			};
		};

		tmc@6027000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b961>;
			reg = <0x6027000 0x1000>;
			reg-names = "tmc-base";
			coresight-name = "coresight-tmc-etf";
			coresight-csr = <0x29>;
			arm,default-sink;
			qcom,force-reg-dump;
			coresight-ctis = <0x2a 0x2b>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ad>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x2d>;
						phandle = <0x30>;
					};
				};

				port@1 {
					reg = <0x0>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x2e>;
						phandle = <0x31>;
					};
				};
			};
		};

		replicator@6026000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b909>;
			reg = <0x6026000 0x1000>;
			reg-names = "replicator-base";
			coresight-name = "coresight-replicator";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ae>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x2f>;
						phandle = <0x2c>;
					};
				};

				port@1 {
					reg = <0x0>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x30>;
						phandle = <0x2d>;
					};
				};
			};
		};

		funnel@6021000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x6021000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-in0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1af>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x31>;
						phandle = <0x2e>;
					};
				};

				port@1 {
					reg = <0x7>;
					endpoint {
						slave-mode;
						remote-endpoint = <0x32>;
						phandle = <0x4b>;
					};
				};

				port@2 {
					reg = <0x6>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x33>;
						phandle = <0x51>;
					};
				};

				port@3 {
					reg = <0x3>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x34>;
						phandle = <0x37>;
					};
				};

				port@4 {
					reg = <0x4>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x35>;
						phandle = <0x3a>;
					};
				};

				port@5 {
					reg = <0x5>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x36>;
						phandle = <0x3d>;
					};
				};
			};
		};

		funnel@6100000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x6100000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-center";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b0>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x37>;
						phandle = <0x34>;
					};
				};

				port@1 {
					reg = <0x0>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x38>;
						phandle = <0x4d>;
					};
				};

				port@2 {
					reg = <0x2>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x39>;
						phandle = <0x50>;
					};
				};
			};
		};

		funnel@6120000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x6120000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-right";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b1>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x3a>;
						phandle = <0x35>;
					};
				};

				port@1 {
					reg = <0x1>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x3b>;
						phandle = <0x4f>;
					};
				};

				port@2 {
					reg = <0x2>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x3c>;
						phandle = <0x42>;
					};
				};
			};
		};

		funnel@6130000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x6130000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-mm";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b2>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x3d>;
						phandle = <0x36>;
					};
				};

				port@1 {
					reg = <0x0>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x3e>;
						phandle = <0x4c>;
					};
				};

				port@2 {
					reg = <0x4>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x3f>;
						phandle = <0x41>;
					};
				};

				port@3 {
					reg = <0x5>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x40>;
						phandle = <0x4e>;
					};
				};
			};
		};

		funnel@6132000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x6132000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-cam";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b3>;

			port {

				endpoint {
					remote-endpoint = <0x41>;
					phandle = <0x3f>;
				};
			};
		};
		funnel@61a1000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b908>;
			reg = <0x61a1000 0x1000>;
			reg-names = "funnel-base";
			coresight-name = "coresight-funnel-apss";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b4>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x42>;
						phandle = <0x3c>;
					};
				};

				port@5 {
					reg = <0x4>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x43>;
						phandle = <0x47>;
					};
				};

				port@6 {
					reg = <0x5>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x44>;
						phandle = <0x48>;
					};
				};

				port@7 {
					reg = <0x6>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x45>;
						phandle = <0x49>;
					};
				};

				port@8 {
					reg = <0x7>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x46>;
						phandle = <0x4a>;
					};
				};
			};
		};

		etm@61bc000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0xbb95d>;
			reg = <0x61bc000 0x1000>;
			cpu = <0x2>;
			qcom,tupwr-disable;
			coresight-name = "coresight-etm0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b5>;

			port {

				endpoint {
					remote-endpoint = <0x47>;
					phandle = <0x43>;
				};
			};
		};

		etm@61bd000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0xbb95d>;
			reg = <0x61bd000 0x1000>;
			cpu = <0x3>;
			qcom,tupwr-disable;
			coresight-name = "coresight-etm1";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b6>;

			port {

				endpoint {
					remote-endpoint = <0x48>;
					phandle = <0x44>;
				};
			};
		};

		etm@61be000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0xbb95d>;
			reg = <0x61be000 0x1000>;
			cpu = <0x4>;
			qcom,tupwr-disable;
			coresight-name = "coresight-etm2";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b7>;

			port {

				endpoint {
					remote-endpoint = <0x49>;
					phandle = <0x45>;
				};
			};
		};

		etm@61bf000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0xbb95d>;
			reg = <0x61bf000 0x1000>;
			qcom,tupwr-disable;
			coresight-name = "coresight-etm3";
			cpu = <0x5>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b8>;

			port {

				endpoint {
					remote-endpoint = <0x4a>;
					phandle = <0x46>;
				};
			};
		};

		stm@6002000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b962>;
			reg = <0x6002000 0x1000 0x9280000 0x180000>;
			reg-names = "stm-base", "stm-stimulus-base";
			coresight-name = "coresight-stm";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1b9>;

			port {

				endpoint {
					remote-endpoint = <0x4b>;
					phandle = <0x32>;
				};
			};
		};

		cti@6010000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6010000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x2a>;
		};

		cti@6011000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6011000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti1";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ba>;
		};

		cti@6012000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6012000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti2";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1bb>;
		};

		cti@6013000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6013000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti3";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1bc>;
		};

		cti@6014000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6014000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti4";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1bd>;
		};

		cti@6015000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6015000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti5";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1be>;
		};

		cti@6016000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6016000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti6";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1bf>;
		};

		cti@6017000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6017000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti7";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c0>;
		};

		cti@6018000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6018000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti8";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x2b>;
		};

		cti@6019000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6019000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti9";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c1>;
		};

		cti@601a000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601a000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti10";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c2>;
		};

		cti@601b000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601b000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti11";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c3>;
		};

		cti@601c000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601c000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti12";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c4>;
		};

		cti@601d000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601d000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti13";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c5>;
		};

		cti@601e000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601e000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti14";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c6>;
		};

		cti@601f000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x601f000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti15";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c7>;
		};

		cti@61b8000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x61b8000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-cpu0";
			cpu = <0x2>;
			qcom,cti-save;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c8>;
		};

		cti@61b9000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x61b9000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-cpu1";
			cpu = <0x3>;
			qcom,cti-save;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1c9>;
		};

		cti@61ba000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x61ba000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-cpu2";
			cpu = <0x4>;
			qcom,cti-save;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ca>;
		};

		cti@61bb000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x61bb000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-cpu3";
			cpu = <0x5>;
			qcom,cti-save;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1cb>;
		};

		cti@6124000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6124000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-modem-cpu0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1cc>;
		};

		cti@6134000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6134000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-video-cpu0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1cd>;
		};

		cti@6139000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x6139000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-wcn-cpu0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1ce>;
		};

		cti@613c000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x613c000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-audio-cpu0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1cf>;
		};

		cti@610c000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b966>;
			reg = <0x610c000 0x1000>;
			reg-names = "cti-base";
			coresight-name = "coresight-cti-rpm-cpu0";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1d0>;
		};

		wcn_etm0 {
			compatible = "qcom,coresight-remote-etm";
			coresight-name = "coresight-wcn-etm0";
			qcom,inst-id = <0x3>;

			port {

				endpoint {
					remote-endpoint = <0x4c>;
					phandle = <0x3e>;
				};
			};
		};

		rpm_etm0 {
			compatible = "qcom,coresight-remote-etm";
			coresight-name = "coresight-rpm-etm0";
			qcom,inst-id = <0x4>;

			port {

				endpoint {
					remote-endpoint = <0x4d>;
					phandle = <0x38>;
				};
			};
		};

		audio_etm0 {
			compatible = "qcom,coresight-remote-etm";
			coresight-name = "coresight-audio-etm0";
			qcom,inst-id = <0x5>;

			port {

				endpoint {
					remote-endpoint = <0x4e>;
					phandle = <0x40>;
				};
			};
		};

		modem_etm0 {
			compatible = "qcom,coresight-remote-etm";
			coresight-name = "coresight-modem-etm0";
			qcom,inst-id = <0x2>;

			port {

				endpoint {
					remote-endpoint = <0x4f>;
					phandle = <0x3b>;
				};
			};
		};

		csr@6001000 {
			compatible = "qcom,coresight-csr";
			reg = <0x6001000 0x1000>;
			reg-names = "csr-base";
			coresight-name = "coresight-csr";
			qcom,usb-bam-support;
			qcom,hwctrl-set-support;
			qcom,set-byte-cntr-support;
			qcom,blk-size = <0x1>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x29>;
		};

		dbgui@6108000 {
			compatible = "qcom,coresight-dbgui";
			reg = <0x6108000 0x1000>;
			reg-names = "dbgui-base";
			coresight-name = "coresight-dbgui";
			qcom,dbgui-addr-offset = <0x30>;
			qcom,dbgui-data-offset = <0x130>;
			qcom,dbgui-size = <0x20>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1d1>;

			port {

				endpoint {
					remote-endpoint = <0x50>;
					phandle = <0x39>;
				};
			};
		};

		tpda@6003000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b969>;
			reg = <0x6003000 0x1000>;
			reg-names = "tpda-base";
			coresight-name = "coresight-tpda";
			qcom,tpda-atid = <0x40>;
			qcom,cmb-elem-size = <0x0 0x20>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1d2>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {

					endpoint {
						remote-endpoint = <0x51>;
						phandle = <0x33>;
					};
				};

				port@1 {
					reg = <0x0>;

					endpoint {
						slave-mode;
						remote-endpoint = <0x52>;
						phandle = <0x53>;
					};
				};
			};
		};

		tpdm@6110000 {
			compatible = "arm,primecell";
			arm,primecell-periphid = <0x3b968>;
			reg = <0x6110000 0x1000>;
			reg-names = "tpdm-base";
			coresight-name = "coresight-tpdm-dcc";
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1d3>;

			port {

				endpoint {
					remote-endpoint = <0x53>;
					phandle = <0x52>;
				};
			};
		};

		hwevent@6101000 {
			compatible = "qcom,coresight-hwevent";
			reg = <0x6101000 0x148 0x6101fb0 0x4 0x6121000 0x148 0x6121fb0 0x4 0x6131000 0x148 0x6131fb0 0x4 0x78c5010 0x4 0x7885010 0x4>;
			reg-names = "center-wrapper-mux", "center-wrapper-lockaccess", "right-wrapper-mux", "right-wrapper-lockaccess", "mm-wrapper-mux", "mm-wrapper-lockaccess", "usbbam-mux", "blsp-mux";
			coresight-name = "coresight-hwevent";
			coresight-csr = <0x29>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "apb_pclk";
			phandle = <0x1d4>;
		};

		ad-hoc-bus@580000 {
			compatible = "qcom,msm-bus-device";
			reg = <0x580000 0x16080 0x580000 0x16080 0x400000 0x5a000 0x500000 0x13080>;
			reg-names = "snoc-base", "snoc-mm-base", "bimc-base", "pcnoc-base";
			phandle = <0x1d5>;

			fab-bimc {
				cell-id = <0x0>;
				label = "fab-bimc";
				qcom,fab-dev;
				qcom,base-name = "bimc-base";
				qcom,bus-type = <0x2>;
				qcom,util-fact = <0x9a>;
				clock-names = "bus_clk", "bus_a_clk";
				clocks = <0xa 0xd212feea 0xa 0x71d1a499>;
				phandle = <0x56>;
			};

			fab-pcnoc {
				cell-id = <0x1000>;
				label = "fab-pcnoc";
				qcom,fab-dev;
				qcom,base-name = "pcnoc-base";
				qcom,base-offset = <0x7000>;
				qcom,qos-off = <0x1000>;
				qcom,bus-type = <0x1>;
				clock-names = "bus_clk", "bus_a_clk";
				clocks = <0xa 0x2b53b688 0xa 0x9753a54f>;
				phandle = <0x58>;
			};

			fab-snoc {
				cell-id = <0x400>;
				label = "fab-snoc";
				qcom,fab-dev;
				qcom,base-name = "snoc-base";
				qcom,base-offset = <0x7000>;
				qcom,qos-off = <0x1000>;
				qcom,bus-type = <0x1>;
				clock-names = "bus_clk", "bus_a_clk";
				clocks = <0xa 0xe6900bb6 0xa 0x5d4683bd>;
				phandle = <0x5f>;
			};

			fab-snoc-mm {
				cell-id = <0x800>;
				label = "fab-snoc-mm";
				qcom,fab-dev;
				qcom,base-name = "snoc-mm-base";
				qcom,base-offset = <0x7000>;
				qcom,qos-off = <0x1000>;
				qcom,bus-type = <0x1>;
				qcom,util-fact = <0x9a>;
				clock-names = "bus_clk", "bus_a_clk";
				clocks = <0xa 0xd61e5721 0xa 0x50600f1b>;
				phandle = <0x64>;
			};

			mas-apps-proc {
				cell-id = <0x1>;
				label = "mas-apps-proc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x0>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x54 0x55>;
				qcom,prio-lvl = <0x0>;
				qcom,prio-rd = <0x0>;
				qcom,prio-wr = <0x0>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x0>;
				phandle = <0x1d6>;
			};

			mas-oxili {
				cell-id = <0x1a>;
				label = "mas-oxili";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x2>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x54 0x55>;
				qcom,prio-lvl = <0x0>;
				qcom,prio-rd = <0x0>;
				qcom,prio-wr = <0x0>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x6>;
				phandle = <0x1d7>;
			};

			mas-snoc-bimc-0 {
				cell-id = <0x2717>;
				label = "mas-snoc-bimc-0";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x3>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x54 0x55>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x3>;
				phandle = <0x8c>;
			};

			mas-snoc-bimc-2 {
				cell-id = <0x273d>;
				label = "mas-snoc-bimc-2";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x4>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x54 0x55>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x6c>;
				phandle = <0x8e>;
			};

			mas-snoc-bimc-1 {
				cell-id = <0x2718>;
				label = "mas-snoc-bimc-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0x5>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x54>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x4c>;
				phandle = <0x8d>;
			};

			mas-tcu-0 {
				cell-id = <0x68>;
				label = "mas-tcu-0";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x6>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x54 0x55>;
				qcom,prio-lvl = <0x2>;
				qcom,prio-rd = <0x2>;
				qcom,bus-dev = <0x56>;
				qcom,mas-rpm-id = <0x66>;
				phandle = <0x1d8>;
			};

			mas-spdm {
				cell-id = <0x24>;
				label = "mas-spdm";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,connections = <0x57>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x32>;
				phandle = <0x1d9>;
			};

			mas-blsp-1 {
				cell-id = <0x56>;
				label = "mas-blsp-1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x59>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x29>;
				phandle = <0x1da>;
			};

			mas-blsp-2 {
				cell-id = <0x54>;
				label = "mas-blsp-2";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x59>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x27>;
				phandle = <0x1db>;
			};

			mas-usb-hs1 {
				cell-id = <0x57>;
				label = "mas-usb-hs1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0xc>;
				qcom,qos-mode = "fixed";
				qcom,prio1 = <0x1>;
				qcom,prio0 = <0x1>;
				qcom,connections = <0x5a>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x2a>;
				phandle = <0x1dc>;
			};

			mas-xi-usb-hs1 {
				cell-id = <0x6e>;
				label = "mas-xi-usb-hs1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0xb>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5a>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x8a>;
				phandle = <0x1dd>;
			};

			mas-crypto {
				cell-id = <0x37>;
				label = "mas-crypto";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x0>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5a>;
				qcom,prio1 = <0x1>;
				qcom,prio0 = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x17>;
				phandle = <0xd3>;
			};

			mas-sdcc-1 {
				cell-id = <0x4e>;
				label = "mas-sdcc-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0x7>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5a>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x21>;
				phandle = <0x1de>;
			};

			mas-sdcc-2 {
				cell-id = <0x51>;
				label = "mas-sdcc-2";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0x8>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5a>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x23>;
				phandle = <0x1df>;
			};

			mas-snoc-pcnoc {
				cell-id = <0x2739>;
				label = "mas-snoc-pcnoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0x9>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5b 0x5c 0x5d>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x4d>;
				phandle = <0x8f>;
			};

			mas-qdss-bam {
				cell-id = <0x35>;
				label = "mas-qdss-bam";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0xb>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5e>;
				qcom,prio1 = <0x1>;
				qcom,prio0 = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x13>;
				phandle = <0x1e0>;
			};

			mas-bimc-snoc {
				cell-id = <0x2720>;
				label = "mas-bimc-snoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x60 0x61 0x62>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x15>;
				phandle = <0x8a>;
			};

			mas-jpeg {
				cell-id = <0x3e>;
				label = "mas-jpeg";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x6>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x63>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0x7>;
				phandle = <0x1e1>;
			};

			mas-mdp {
				cell-id = <0x16>;
				label = "mas-mdp";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x7>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x65>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0x8>;
				phandle = <0x1e2>;
			};

			mas-pcnoc-snoc {
				cell-id = <0x271a>;
				label = "mas-pcnoc-snoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,qport = <0x5>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x60 0x61 0x66>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x1d>;
				qcom,blacklist = <0x67>;
				phandle = <0x8b>;
			};

			mas-venus {
				cell-id = <0x3f>;
				label = "mas-venus";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x8>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x63>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0x9>;
				phandle = <0x1e3>;
			};

			mas-vfe0 {
				cell-id = <0x1d>;
				label = "mas-vfe0";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x9>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x65>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0xb>;
				phandle = <0x1e4>;
			};

			mas-vfe1 {
				cell-id = <0x6d>;
				label = "mas-vfe1";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0xd>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x65>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0x85>;
				phandle = <0x1e5>;
			};

			mas-cpp {
				cell-id = <0x6a>;
				label = "mas-cpp";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0xc>;
				qcom,qos-mode = "bypass";
				qcom,connections = <0x63>;
				qcom,bus-dev = <0x64>;
				qcom,mas-rpm-id = <0x73>;
				phandle = <0x1e6>;
			};

			mas-qdss-etr {
				cell-id = <0x3c>;
				label = "mas-qdss-etr";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0xa>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5e>;
				qcom,prio1 = <0x1>;
				qcom,prio0 = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x1f>;
				phandle = <0x1e7>;
			};

			pcnoc-m-0 {
				cell-id = <0x271e>;
				label = "pcnoc-m-0";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,qport = <0x5>;
				qcom,qos-mode = "fixed";
				qcom,connections = <0x5a>;
				qcom,prio1 = <0x1>;
				qcom,prio0 = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x57>;
				qcom,slv-rpm-id = <0x74>;
				phandle = <0x57>;
			};

			pcnoc-m-1 {
				cell-id = <0x271f>;
				label = "pcnoc-m-1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x5a>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x58>;
				qcom,slv-rpm-id = <0x75>;
				phandle = <0x59>;
			};

			pcnoc-int-0 {
				cell-id = <0x271c>;
				label = "pcnoc-int-0";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x68 0x5b 0x5d 0x5c>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x55>;
				qcom,slv-rpm-id = <0x72>;
				phandle = <0x5a>;
			};

			pcnoc-int-1 {
				cell-id = <0x271d>;
				label = "pcnoc-int-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x68 0x5b 0x5d 0x5c>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x56>;
				qcom,slv-rpm-id = <0x73>;
				phandle = <0x1e8>;
			};

			pcnoc-int-2 {
				cell-id = <0x2741>;
				label = "pcnoc-int-2";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x69 0x6a 0x6b 0x6c>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x7c>;
				qcom,slv-rpm-id = <0xb8>;
				phandle = <0x5c>;
			};

			pcnoc-int-3 {
				cell-id = <0x2742>;
				label = "pcnoc-int-3";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x6d 0x6e 0x6f 0x70 0x71>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x7d>;
				qcom,slv-rpm-id = <0xb9>;
				phandle = <0x5d>;
			};

			pcnoc-s-0 {
				cell-id = <0x2722>;
				label = "pcnoc-s-0";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x72 0x73 0x74 0x75>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x59>;
				qcom,slv-rpm-id = <0x76>;
				phandle = <0x6e>;
			};

			pcnoc-s-1 {
				cell-id = <0x2723>;
				label = "pcnoc-s-1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x76>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5a>;
				qcom,slv-rpm-id = <0x77>;
				phandle = <0x6d>;
			};

			pcnoc-s-2 {
				cell-id = <0x2724>;
				label = "pcnoc-s-2";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x77>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5b>;
				qcom,slv-rpm-id = <0x78>;
				phandle = <0x69>;
			};

			pcnoc-s-3 {
				cell-id = <0x2725>;
				label = "pcnoc-s-3";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x78>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5c>;
				qcom,slv-rpm-id = <0x79>;
				phandle = <0x6a>;
			};

			pcnoc-s-4 {
				cell-id = <0x2726>;
				label = "pcnoc-s-4";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,connections = <0x79 0x7a 0x7b>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5d>;
				qcom,slv-rpm-id = <0x7a>;
				phandle = <0x6f>;
			};

			pcnoc-s-6 {
				cell-id = <0x2d1>;
				label = "pcnoc-s-6";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x7c 0x7d 0x7e>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5e>;
				qcom,slv-rpm-id = <0x7b>;
				phandle = <0x6b>;
			};

			pcnoc-s-7 {
				cell-id = <0x2740>;
				label = "pcnoc-s-7";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x7f 0x80>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x5f>;
				qcom,slv-rpm-id = <0x7c>;
				phandle = <0x5b>;
			};

			pcnoc-s-8 {
				cell-id = <0x2727>;
				label = "pcnoc-s-8";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x81 0x82>;
				qcom,bus-dev = <0x58>;
				qcom,mas-rpm-id = <0x60>;
				qcom,slv-rpm-id = <0x7d>;
				phandle = <0x6c>;
			};

			qdss-int {
				cell-id = <0x2719>;
				label = "qdss-int";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,connections = <0x61 0x66>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x62>;
				qcom,slv-rpm-id = <0x80>;
				phandle = <0x5e>;
			};

			snoc-int-0 {
				cell-id = <0x2714>;
				label = "snoc-int-0";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,connections = <0x83 0x84 0x85>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x63>;
				qcom,slv-rpm-id = <0x82>;
				phandle = <0x60>;
			};

			snoc-int-1 {
				cell-id = <0x2715>;
				label = "snoc-int-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,connections = <0x86 0x87 0x67>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x64>;
				qcom,slv-rpm-id = <0x83>;
				phandle = <0x61>;
			};

			snoc-int-2 {
				cell-id = <0x2752>;
				label = "snoc-int-2";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,connections = <0x88 0x89>;
				qcom,bus-dev = <0x5f>;
				qcom,mas-rpm-id = <0x86>;
				qcom,slv-rpm-id = <0xc5>;
				phandle = <0x62>;
			};

			slv-ebi {
				cell-id = <0x200>;
				label = "slv-ebi";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x56>;
				qcom,slv-rpm-id = <0x0>;
				phandle = <0x54>;
			};

			slv-bimc-snoc {
				cell-id = <0x2721>;
				label = "slv-bimc-snoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x56>;
				qcom,connections = <0x8a>;
				qcom,slv-rpm-id = <0x2>;
				phandle = <0x55>;
			};

			slv-sdcc-2 {
				cell-id = <0x260>;
				label = "slv-sdcc-2";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x21>;
				phandle = <0x75>;
			};

			slv-spdm {
				cell-id = <0x279>;
				label = "slv-spdm";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x3c>;
				phandle = <0x72>;
			};

			slv-pdm {
				cell-id = <0x267>;
				label = "slv-pdm";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x29>;
				phandle = <0x73>;
			};

			slv-prng {
				cell-id = <0x26a>;
				label = "slv-prng";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x2c>;
				phandle = <0x74>;
			};

			slv-tcsr {
				cell-id = <0x26f>;
				label = "slv-tcsr";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x32>;
				phandle = <0x76>;
			};

			slv-snoc-cfg {
				cell-id = <0x282>;
				label = "slv-snoc-cfg";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x46>;
				phandle = <0x77>;
			};

			slv-message-ram {
				cell-id = <0x274>;
				label = "slv-message-ram";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x37>;
				phandle = <0x78>;
			};

			slv-camera-ss-cfg {
				cell-id = <0x24d>;
				label = "slv-camera-ss-cfg";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x3>;
				phandle = <0x79>;
			};

			slv-disp-ss-cfg {
				cell-id = <0x24e>;
				label = "slv-disp-ss-cfg";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x4>;
				phandle = <0x7a>;
			};

			slv-venus-cfg {
				cell-id = <0x254>;
				label = "slv-venus-cfg";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0xa>;
				phandle = <0x7b>;
			};

			slv-gpu-cfg {
				cell-id = <0x256>;
				label = "slv-gpu-cfg";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0xb>;
				phandle = <0x70>;
			};

			slv-tlmm {
				cell-id = <0x270>;
				label = "slv-tlmm";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x33>;
				phandle = <0x7c>;
			};

			slv-blsp-1 {
				cell-id = <0x265>;
				label = "slv-blsp-1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x27>;
				phandle = <0x7d>;
			};

			slv-blsp-2 {
				cell-id = <0x263>;
				label = "slv-blsp-2";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x25>;
				phandle = <0x7e>;
			};

			slv-pmic-arb {
				cell-id = <0x278>;
				label = "slv-pmic-arb";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x3b>;
				phandle = <0x80>;
			};

			slv-sdcc-1 {
				cell-id = <0x25e>;
				label = "slv-sdcc-1";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x1f>;
				phandle = <0x7f>;
			};

			slv-crypto-0-cfg {
				cell-id = <0x271>;
				label = "slv-crypto-0-cfg";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x34>;
				phandle = <0x82>;
			};

			slv-usb-hs {
				cell-id = <0x266>;
				label = "slv-usb-hs";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x28>;
				phandle = <0x81>;
			};

			slv-tcu {
				cell-id = <0x2a0>;
				label = "slv-tcu";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x58>;
				qcom,slv-rpm-id = <0x85>;
				phandle = <0x71>;
			};

			slv-pcnoc-snoc {
				cell-id = <0x271b>;
				label = "slv-pcnoc-snoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x58>;
				qcom,connections = <0x8b>;
				qcom,slv-rpm-id = <0x2d>;
				phandle = <0x68>;
			};

			slv-kpss-ahb {
				cell-id = <0x2a1>;
				label = "slv-kpss-ahb";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x14>;
				phandle = <0x85>;
			};

			slv-wcss {
				cell-id = <0x248>;
				label = "slv-wcss";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x17>;
				phandle = <0x84>;
			};

			slv-snoc-bimc-0 {
				cell-id = <0x2729>;
				label = "slv-snoc-bimc-0";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x64>;
				qcom,connections = <0x8c>;
				qcom,slv-rpm-id = <0x18>;
				phandle = <0x65>;
			};

			slv-snoc-bimc-1 {
				cell-id = <0x272a>;
				label = "slv-snoc-bimc-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,connections = <0x8d>;
				qcom,slv-rpm-id = <0x68>;
				phandle = <0x66>;
			};

			slv-snoc-bimc-2 {
				cell-id = <0x273e>;
				label = "slv-snoc-bimc-2";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x64>;
				qcom,connections = <0x8e>;
				qcom,slv-rpm-id = <0x89>;
				phandle = <0x63>;
			};

			slv-imem {
				cell-id = <0x249>;
				label = "slv-imem";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x1a>;
				phandle = <0x87>;
			};

			slv-snoc-pcnoc {
				cell-id = <0x273a>;
				label = "slv-snoc-pcnoc";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,connections = <0x8f>;
				qcom,slv-rpm-id = <0x1c>;
				phandle = <0x67>;
			};

			slv-qdss-stm {
				cell-id = <0x24c>;
				label = "slv-qdss-stm";
				qcom,buswidth = <0x4>;
				qcom,agg-ports = <0x1>;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x1e>;
				phandle = <0x86>;
			};

			slv-cats-0 {
				cell-id = <0x297>;
				label = "slv-cats-0";
				qcom,buswidth = <0x10>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x64>;
				qcom,slv-rpm-id = <0x6a>;
				phandle = <0x88>;
			};

			slv-cats-1 {
				cell-id = <0x298>;
				label = "slv-cats-1";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x6b>;
				phandle = <0x89>;
			};

			slv-lpass {
				cell-id = <0x20a>;
				label = "slv-lpass";
				qcom,buswidth = <0x8>;
				qcom,agg-ports = <0x1>;
				qcom,ap-owned;
				qcom,bus-dev = <0x5f>;
				qcom,slv-rpm-id = <0x15>;
				phandle = <0x83>;
			};
		};

		devfreq_spdm_cpu {
			compatible = "qcom,devfreq_spdm";
			qcom,msm-bus,name = "devfreq_spdm";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x1 0x200 0x0 0x0 0x1 0x200 0x0 0x0>;
			qcom,msm-bus,active-only;
			qcom,spdm-client = <0x0>;
			clock-names = "cci_clk";
			clocks = <0x90 0xcf28e63a>;
			qcom,bw-upstep = <0x190>;
			qcom,bw-dwnstep = <0xaf0>;
			qcom,max-vote = <0xaf0>;
			qcom,up-step-multp = <0x2>;
			qcom,spdm-interval = <0x32>;
			qcom,ports = <0xb>;
			qcom,alpha-up = <0x8>;
			qcom,alpha-down = <0xf>;
			qcom,bucket-size = <0x8>;
			qcom,pl-freqs = <0x4baf0 0x8b290>;
			qcom,reject-rate = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>;
			qcom,response-time-us = <0x1388 0x1388 0x1388 0x1388 0x7d0 0x7d0>;
			qcom,cci-response-time-us = <0xbb8 0xbb8 0xfa0 0xfa0 0x7d0 0x7d0>;
			qcom,max-cci-freq = <0x13d620>;
		};

		devfreq_spdm_gov {
			compatible = "qcom,gov_spdm_hyp";
			interrupt-names = "spdm-irq";
			interrupts = <0x0 0xc0 0x0>;
		};

		qcom,mdss_mdp@1a00000 {
			compatible = "qcom,mdss_mdp";
			reg = <0x1a00000 0x90000 0x1ab0000 0x1040>;
			reg-names = "mdp_phys", "vbif_phys";
			interrupts = <0x0 0x48 0x0>;
			vdd-supply = <0x91>;
			qcom,msm-bus,name = "mdss_mdp";
			qcom,msm-bus,num-cases = <0x3>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>;
			qcom,mdss-ab-factor = <0x1 0x1>;
			qcom,mdss-ib-factor = <0x1 0x1>;
			qcom,mdss-clk-factor = <0x69 0x64>;
			qcom,max-mixer-width = <0x800>;
			qcom,max-pipe-width = <0x800>;
			qcom,mdss-vbif-qos-rt-setting = <0x1 0x2 0x2 0x2>;
			qcom,mdss-vbif-qos-nrt-setting = <0x1 0x1 0x1 0x1>;
			qcom,mdss-has-panic-ctrl;
			qcom,mdss-per-pipe-panic-luts = <0xf 0x0 0xfffc 0x0>;
			qcom,mdss-mdp-reg-offset = <0x1000>;
			qcom,max-bandwidth-low-kbps = <0x1b7740>;
			qcom,max-bandwidth-high-kbps = <0x1b7740>;
			qcom,max-bandwidth-per-pipe-kbps = <0xf4240>;
			qcom,max-bw-settings = <0x1 0x2f4d60 0x2 0x19f0a0>;
			qcom,max-clk-rate = <0x1312d000>;
			qcom,mdss-default-ot-rd-limit = <0x20>;
			qcom,mdss-default-ot-wr-limit = <0x10>;
			qcom,mdss-pipe-vig-off = <0x5000>;
			qcom,mdss-pipe-rgb-off = <0x15000 0x17000>;
			qcom,mdss-pipe-dma-off = <0x25000>;
			qcom,mdss-pipe-cursor-off = <0x35000>;
			qcom,mdss-pipe-vig-xin-id = <0x0>;
			qcom,mdss-pipe-rgb-xin-id = <0x1 0x5>;
			qcom,mdss-pipe-dma-xin-id = <0x2>;
			qcom,mdss-pipe-cursor-xin-id = <0x7>;
			qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0x0 0x0>;
			qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 0x4 0x8 0x2b4 0x4 0x8>;
			qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 0x8 0xc>;
			qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3a8 0x10 0xf>;
			qcom,mdss-ctl-off = <0x2000 0x2200 0x2400>;
			qcom,mdss-mixer-intf-off = <0x45000>;
			qcom,mdss-dspp-off = <0x55000>;
			qcom,mdss-wb-off = <0x65000 0x66000>;
			qcom,mdss-intf-off = <0x0 0x6b800>;
			qcom,mdss-pingpong-off = <0x71000>;
			qcom,mdss-slave-pingpong-off = <0x73000>;
			qcom,mdss-cdm-off = <0x7a200>;
			qcom,mdss-wfd-mode = "dedicated";
			qcom,mdss-has-decimation;
			qcom,mdss-has-non-scalar-rgb;
			qcom,mdss-has-rotator-downscale;
			qcom,mdss-rot-downscale-min = <0x2>;
			qcom,mdss-rot-downscale-max = <0x10>;
			qcom,mdss-idle-power-collapse-enabled;
			qcom,mdss-rot-block-size = <0x40>;
			clocks = <0xa 0xbfb92ed3 0xa 0x668f51de 0xa 0x6dc1f8f1 0x92 0x588460a4 0xa 0x32a09f1f>;
			clock-names = "iface_clk", "bus_clk", "core_clk_src", "core_clk", "vsync_clk";
			qcom,mdp-settings = <0x506c 0x0 0x1506c 0x0 0x1706c 0x0 0x2506c 0x0>;
			qcom,regs-dump-mdp = <0x1000 0x1454 0x2000 0x2064 0x2200 0x2264 0x2400 0x2464 0x5000 0x5150 0x5200 0x5230 0x15000 0x15150 0x17000 0x17150 0x25000 0x25150 0x35000 0x35150 0x45000 0x452bc 0x46000 0x462bc 0x55000 0x5522c 0x65000 0x652c0 0x66000 0x662c0 0x6b800 0x6ba68 0x71000 0x710d4>;
			qcom,regs-dump-names-mdp = "MDP", "CTL_0", "CTL_1", "CTL_2", "VIG0_SSPP", "VIG0", "RGB0_SSPP", "RGB1_SSPP", "DMA0_SSPP", "CURSOR0_SSPP", "LAYER_0", "LAYER_1", "DSPP_0", "WB_0", "WB_2", "INTF_1", "PP_0";
			qcom,mdss-prefill-outstanding-buffer-bytes = <0x0>;
			qcom,mdss-prefill-y-buffer-bytes = <0x0>;
			qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x2>;
			qcom,mdss-prefill-scaler-buffer-lines-caf = <0x4>;
			qcom,mdss-prefill-post-scaler-buffer-pixels = <0x800>;
			qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>;
			qcom,mdss-mixer-wb-off = <0x46000>;
			phandle = <0x96>;

			qcom,mdss-pp-offsets {
				qcom,mdss-sspp-mdss-igc-lut-off = <0x2000>;
				qcom,mdss-sspp-vig-pcc-off = <0x1780>;
				qcom,mdss-sspp-rgb-pcc-off = <0x380>;
				qcom,mdss-sspp-dma-pcc-off = <0x380>;
				qcom,mdss-lm-pgc-off = <0x3c0>;
				qcom,mdss-dspp-pcc-off = <0x1700>;
				qcom,mdss-dspp-pgc-off = <0x17c0>;
			};

			qcom,mdss-reg-bus {
				qcom,msm-bus,name = "mdss_reg";
				qcom,msm-bus,num-cases = <0x4>;
				qcom,msm-bus,num-paths = <0x1>;
				qcom,msm-bus,active-only;
				qcom,msm-bus,vectors-KBps = <0x1 0x24e 0x0 0x0 0x1 0x24e 0x0 0x12c00 0x1 0x24e 0x0 0x27100 0x1 0x24e 0x0 0x4e200>;
			};

			qcom,mdss-hw-rt-bus {
				qcom,msm-bus,name = "mdss_hw_rt";
				qcom,msm-bus,num-cases = <0x2>;
				qcom,msm-bus,num-paths = <0x1>;
				qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x3e8>;
			};

			qcom,smmu_mdp_unsec_cb {
				compatible = "qcom,smmu_mdp_unsec";
				iommus = <0xe 0x2800 0x0>;
				phandle = <0x1e9>;
			};

			qcom,smmu_mdp_sec_cb {
				compatible = "qcom,smmu_mdp_sec";
				iommus = <0xe 0x2801 0x0>;
				phandle = <0x1ea>;
			};

			qcom,mdss_fb_primary {
				cell-index = <0x0>;
				compatible = "qcom,mdss-fb";
				phandle = <0x95>;

				qcom,cont-splash-memory {
					linux,contiguous-region = <0x93>;
				};
			};

			qcom,mdss_fb_wfd {
				cell-index = <0x1>;
				compatible = "qcom,mdss-fb";
				phandle = <0x97>;
			};
		};

		qcom,mdss_dsi@0 {
			compatible = "qcom,mdss-dsi";
			hw-config = "single_dsi";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			gdsc-supply = <0x91>;
			vdda-supply = <0x94>;
			vddio-supply = <0x94>;
			qcom,msm-bus,name = "mdss_dsi";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x3e8>;
			ranges = <0x1a94000 0x1a94000 0x300 0x1a94400 0x1a94400 0x280 0x1a94b80 0x1a94b80 0x30 0x193e000 0x193e000 0x30>;
			clocks = <0x92 0x588460a4 0xa 0xbfb92ed3 0xa 0x668f51de 0x92 0xfb32f31e 0x92 0x87c1612>;
			clock-names = "mdp_core_clk", "iface_clk", "bus_clk", "ext_byte0_clk", "ext_pixel0_clk";
			qcom,mmss-ulp-clamp-ctrl-offset = <0x20>;
			qcom,mmss-phyreset-ctrl-offset = <0x24>;
			qcom,mdss-fb-map-prim = <0x95>;
			phandle = <0x1eb>;

			qcom,core-supply-entries {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				qcom,core-supply-entry@0 {
					reg = <0x0>;
					qcom,supply-name = "gdsc";
					qcom,supply-min-voltage = <0x0>;
					qcom,supply-max-voltage = <0x0>;
					qcom,supply-enable-load = <0x0>;
					qcom,supply-disable-load = <0x0>;
				};
			};

			qcom,ctrl-supply-entries {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				qcom,ctrl-supply-entry@0 {
					reg = <0x0>;
					qcom,supply-name = "vdda";
					qcom,supply-min-voltage = <0x1a9c80>;
					qcom,supply-max-voltage = <0x1d0d80>;
					qcom,supply-enable-load = <0x186a0>;
					qcom,supply-disable-load = <0x64>;
					qcom,supply-post-on-sleep = <0x14>;
				};
			};

			qcom,phy-supply-entries {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				qcom,phy-supply-entry@0 {
					reg = <0x0>;
					qcom,supply-name = "vddio";
					qcom,supply-min-voltage = <0x1a9c80>;
					qcom,supply-max-voltage = <0x1d0d80>;
					qcom,supply-enable-load = <0x186a0>;
					qcom,supply-disable-load = <0x64>;
				};
			};

			qcom,mdss_dsi_ctrl0@1a94000 {
				compatible = "qcom,mdss-dsi-ctrl";
				label = "MDSS DSI CTRL->0";
				cell-index = <0x0>;
				reg = <0x1a94000 0x300 0x1a94400 0x280 0x1a94b80 0x30 0x193e000 0x30>;
				reg-names = "dsi_ctrl", "dsi_phy", "dsi_phy_regulator", "mmss_misc_phys";
				qcom,timing-db-mode;
				qcom,mdss-mdp = <0x96>;
				vddio-supply = <0x94>;
				clocks = <0x92 0x35da7862 0x92 0xcc5c5c77 0xa 0xaec5cb25 0x92 0x75cc885b 0x92 0xccac1f35>;
				clock-names = "byte_clk", "pixel_clk", "core_clk", "byte_clk_rcg", "pixel_clk_rcg";
				qcom,platform-strength-ctrl = [ff 06];
				qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];
				qcom,platform-regulator-settings = [03 08 07 00 20 07 01];
				qcom,platform-lane-config = [01 c0 00 00 00 00 00 01 97 01 c0 00 00 05 00 00 01 97 01 c0 00 00 0a 00 00 01 97 01 c0 00 00 0f 00 00 01 97 00 40 00 00 00 00 00 01 ff];
				phandle = <0x1ec>;
			};
		};

		qcom,mdss_wb_panel {
			compatible = "qcom,mdss_wb";
			qcom,mdss_pan_res = <0x280 0x280>;
			qcom,mdss_pan_bpp = <0x18>;
			qcom,mdss-fb-map = <0x97>;
		};

		qcom,mdss_rotator {
			compatible = "qcom,mdss_rotator";
			qcom,mdss-wb-count = <0x1>;
			qcom,mdss-has-downscale;
			qcom,msm-bus,name = "mdss_rotator";
			qcom,msm-bus,num-cases = <0x3>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>;
			rot-vdd-supply = <0x91>;
			qcom,supply-names = "rot-vdd";
			qcom,mdss-has-reg-bus;
			clocks = <0xa 0xbfb92ed3 0x92 0x5b1f675e>;
			clock-names = "iface_clk", "rot_core_clk";
			phandle = <0x1ed>;

			qcom,mdss-rot-reg-bus {
				qcom,msm-bus,name = "mdss_rot_reg";
				qcom,msm-bus,num-cases = <0x2>;
				qcom,msm-bus,num-paths = <0x1>;
				qcom,msm-bus,active-only;
				qcom,msm-bus,vectors-KBps = <0x1 0x24e 0x0 0x0 0x1 0x24e 0x0 0x12c00>;
			};
		};

		qcom,mdss_dsi_pll@1a94a00 {
			compatible = "qcom,mdss_dsi_pll_8937";
			label = "MDSS DSI 0 PLL";
			cell-index = <0x0>;
			#clock-cells = <0x1>;
			reg = <0x1a94a00 0xd4 0x184d074 0x8>;
			reg-names = "pll_base", "gdsc_base";
			gdsc-supply = <0x91>;
			vddio-supply = <0x94>;
			clocks = <0xa 0xbfb92ed3>;
			clock-names = "iface_clk";
			clock-rate = <0x0>;
			qcom,dsi-pll-ssc-en;
			qcom,dsi-pll-ssc-mode = "down-spread";
			qcom,ssc-frequency-hz = <0x7530>;
			qcom,ssc-ppm = <0x1388>;
			phandle = <0xb6>;

			qcom,platform-supply-entries {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				qcom,platform-supply-entry@0 {
					reg = <0x0>;
					qcom,supply-name = "gdsc";
					qcom,supply-min-voltage = <0x0>;
					qcom,supply-max-voltage = <0x0>;
					qcom,supply-enable-load = <0x0>;
					qcom,supply-disable-load = <0x0>;
				};

				qcom,platform-supply-entry@1 {
					reg = <0x1>;
					qcom,supply-name = "vddio";
					qcom,supply-min-voltage = <0x1b7740>;
					qcom,supply-max-voltage = <0x1b7740>;
					qcom,supply-enable-load = <0x186a0>;
					qcom,supply-disable-load = <0x64>;
				};
			};
		};

		qcom,iommu@1f00000 {
			status = "ok";
			compatible = "qcom,qsmmu-v500";
			reg = <0x1f00000 0x10000 0x1ee2000 0x20>;
			reg-names = "base", "tcu-base";
			#iommu-cells = <0x1>;
			qcom,tz-device-id = "GPU";
			qcom,skip-init;
			qcom,enable-static-cb;
			qcom,dynamic;
			qcom,use-3-lvl-tables;
			#global-interrupts = <0x0>;
			#size-cells = <0x1>;
			#address-cells = <0x1>;
			ranges;
			interrupts = <0x0 0xf0 0x4 0x0 0xf1 0x4 0x0 0xf2 0x4 0x0 0xf3 0x4>;
			clocks = <0xa 0x75eaefa5 0xa 0x59505e55>;
			clock-names = "iface_clk", "core_clk";
			phandle = <0x9a>;
		};

		qcom,iommu@1e00000 {
			status = "okay";
			compatible = "qcom,qsmmu-v500";
			reg = <0x1e00000 0x40000 0x1ee2000 0x20>;
			reg-names = "base", "tcu-base";
			#iommu-cells = <0x2>;
			qcom,tz-device-id = "APPS";
			qcom,skip-init;
			qcom,disable-atos;
			ranges;
			qcom,enable-static-cb;
			qcom,use-3-lvl-tables;
			#global-interrupts = <0x0>;
			#size-cells = <0x1>;
			#address-cells = <0x1>;
			interrupts = <0x0 0xfd 0x4 0x0 0xfe 0x4 0x0 0xff 0x4 0x0 0x35 0x4 0x0 0x36 0x4 0x0 0x3a 0x4 0x0 0x3c 0x4 0x0 0x3d 0x4 0x0 0x4c 0x4 0x0 0x4d 0x4 0x0 0x50 0x4 0x0 0x5e 0x4 0x0 0x65 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6d 0x4 0x0 0x6e 0x4 0x0 0x6f 0x4 0x0 0x70 0x4 0x0 0x71 0x4 0x0 0x72 0x4 0x0 0x73 0x4 0x0 0x74 0x4 0x0 0x75 0x4 0x0 0x76 0x4 0x0 0x77 0x4 0x0 0x78 0x4 0x0 0x79 0x4 0x0 0x7a 0x4>;
			clocks = <0xa 0x75eaefa5 0xa 0xaf56a329>;
			clock-names = "iface_clk", "core_clk";
			phandle = <0xe>;
		};

		qcom,kgsl-busmon {
			label = "kgsl-busmon";
			compatible = "qcom,kgsl-busmon";
			phandle = <0x1ee>;
		};

		qcom,gpubw {
			compatible = "qcom,devbw";
			governor = "bw_vbif";
			qcom,src-dst-ports = <0x1a 0x200>;
			qcom,active-only;
			qcom,bw-tbl = <0x0 0x301 0x64b 0x8de 0xb71 0x1098 0x11bd 0x1406 0x1607>;
			phandle = <0x98>;
		};

		qcom,kgsl-3d0@1c00000 {
			label = "kgsl-3d0";
			compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
			reg = <0x1c00000 0x10000 0x1c10000 0x10000 0xa0000 0x6fff>;
			reg-names = "kgsl_3d0_reg_memory", "kgsl_3d0_shader_memory", "qfprom_memory";
			interrupts = <0x0 0x21 0x0>;
			interrupt-names = "kgsl_3d0_irq";
			qcom,id = <0x0>;
			qcom,chipid = <0x3000620>;
			qcom,initial-pwrlevel = <0x3>;
			qcom,idle-timeout = <0x50>;
			qcom,strtstp-sleepwake;
			qcom,gpu-bimc-interface-clk-freq = <0x17d78400>;
			clocks = <0xa 0x49a51fd9 0xa 0xd15c8a00 0xa 0x3edd69ad 0xa 0x19922503 0xa 0xb432168e 0xa 0x59505e55 0xa 0x18bb9a90 0xa 0xd3e0a327>;
			clock-names = "core_clk", "iface_clk", "mem_iface_clk", "alt_mem_iface_clk", "gtcu_iface_clk", "gtcu_clk", "gtbu_clk", "bimc_gpu_clk";
			qcom,gpubw-dev = <0x98>;
			qcom,bus-control;
			qcom,bus-width = <0x10>;
			qcom,msm-bus,name = "grp3d";
			qcom,msm-bus,num-cases = <0x9>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x1a 0x200 0x0 0xc4e00 0x1a 0x200 0x0 0x19c800 0x1a 0x200 0x0 0x245400 0x1a 0x200 0x0 0x2ee000 0x1a 0x200 0x0 0x43f800 0x1a 0x200 0x0 0x48a800 0x1a 0x200 0x0 0x520800 0x1a 0x200 0x0 0x5a3c00>;
			regulator-names = "vdd";
			vdd-supply = <0x99>;
			qcom,pm-qos-active-latency = <0x28b>;
			#cooling-cells = <0x2>;
			qcom,gpu-speed-bin = <0x164 0x600 0x9>;
			phandle = <0xa2>;

			qcom,gpu-pwrlevel-bins {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "qcom,gpu-pwrlevel-bins";

				qcom,gpu-pwrlevels-0 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					qcom,speed-bin = <0x0>;
					qcom,initial-pwrlevel = <0x3>;

					qcom,gpu-pwrlevel@0 {
						reg = <0x0>;
						qcom,gpu-freq = <0x23a4c180>;
						qcom,bus-freq = <0x7>;
						qcom,bus-min = <0x7>;
						qcom,bus-max = <0x7>;
					};

					qcom,gpu-pwrlevel@1 {
						reg = <0x1>;
						qcom,gpu-freq = <0x1f2f6600>;
						qcom,bus-freq = <0x6>;
						qcom,bus-min = <0x5>;
						qcom,bus-max = <0x7>;
					};

					qcom,gpu-pwrlevel@2 {
						reg = <0x2>;
						qcom,gpu-freq = <0x1ce57600>;
						qcom,bus-freq = <0x5>;
						qcom,bus-min = <0x4>;
						qcom,bus-max = <0x6>;
					};

					qcom,gpu-pwrlevel@3 {
						reg = <0x3>;
						qcom,gpu-freq = <0x17d78400>;
						qcom,bus-freq = <0x4>;
						qcom,bus-min = <0x3>;
						qcom,bus-max = <0x5>;
					};

					qcom,gpu-pwrlevel@4 {
						reg = <0x4>;
						qcom,gpu-freq = <0x1017df80>;
						qcom,bus-freq = <0x3>;
						qcom,bus-min = <0x1>;
						qcom,bus-max = <0x3>;
					};

					qcom,gpu-pwrlevel@5 {
						reg = <0x5>;
						qcom,gpu-freq = <0x124f800>;
						qcom,bus-freq = <0x0>;
						qcom,bus-min = <0x0>;
						qcom,bus-max = <0x0>;
					};
				};

				qcom,gpu-pwrlevels-1 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					qcom,speed-bin = <0x1>;
					qcom,initial-pwrlevel = <0x2>;

					qcom,gpu-pwrlevel@0 {
						reg = <0x0>;
						qcom,gpu-freq = <0x1dcd6500>;
						qcom,bus-freq = <0x7>;
						qcom,bus-min = <0x6>;
						qcom,bus-max = <0x7>;
					};

					qcom,gpu-pwrlevel@1 {
						reg = <0x1>;
						qcom,gpu-freq = <0x1bb75640>;
						qcom,bus-freq = <0x7>;
						qcom,bus-min = <0x5>;
						qcom,bus-max = <0x7>;
					};

					qcom,gpu-pwrlevel@2 {
						reg = <0x2>;
						qcom,gpu-freq = <0x17d78400>;
						qcom,bus-freq = <0x4>;
						qcom,bus-min = <0x3>;
						qcom,bus-max = <0x5>;
					};

					qcom,gpu-pwrlevel@3 {
						reg = <0x3>;
						qcom,gpu-freq = <0x1017df80>;
						qcom,bus-freq = <0x3>;
						qcom,bus-min = <0x1>;
						qcom,bus-max = <0x3>;
					};

					qcom,gpu-pwrlevel@4 {
						reg = <0x4>;
						qcom,gpu-freq = <0x124f800>;
						qcom,bus-freq = <0x0>;
						qcom,bus-min = <0x0>;
						qcom,bus-max = <0x0>;
					};
				};

				qcom,gpu-pwrlevels-2 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					qcom,speed-bin = <0x2>;
					qcom,initial-pwrlevel = <0x1>;

					qcom,gpu-pwrlevel@0 {
						reg = <0x0>;
						qcom,gpu-freq = <0x1bb75640>;
						qcom,bus-freq = <0x7>;
						qcom,bus-min = <0x5>;
						qcom,bus-max = <0x7>;
					};

					qcom,gpu-pwrlevel@1 {
						reg = <0x1>;
						qcom,gpu-freq = <0x17d78400>;
						qcom,bus-freq = <0x4>;
						qcom,bus-min = <0x3>;
						qcom,bus-max = <0x5>;
					};

					qcom,gpu-pwrlevel@2 {
						reg = <0x2>;
						qcom,gpu-freq = <0x1017df80>;
						qcom,bus-freq = <0x3>;
						qcom,bus-min = <0x1>;
						qcom,bus-max = <0x3>;
					};

					qcom,gpu-pwrlevel@3 {
						reg = <0x3>;
						qcom,gpu-freq = <0x124f800>;
						qcom,bus-freq = <0x0>;
						qcom,bus-min = <0x0>;
						qcom,bus-max = <0x0>;
					};
				};

				qcom,gpu-pwrlevels-3 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					qcom,speed-bin = <0x3>;
					qcom,initial-pwrlevel = <0x0>;

					qcom,gpu-pwrlevel@0 {
						reg = <0x0>;
						qcom,gpu-freq = <0x17d78400>;
						qcom,bus-freq = <0x4>;
						qcom,bus-min = <0x3>;
						qcom,bus-max = <0x6>;
					};

					qcom,gpu-pwrlevel@1 {
						reg = <0x1>;
						qcom,gpu-freq = <0x1017df80>;
						qcom,bus-freq = <0x3>;
						qcom,bus-min = <0x1>;
						qcom,bus-max = <0x3>;
					};

					qcom,gpu-pwrlevel@2 {
						reg = <0x2>;
						qcom,gpu-freq = <0x124f800>;
						qcom,bus-freq = <0x0>;
						qcom,bus-min = <0x0>;
						qcom,bus-max = <0x0>;
					};
				};
			};
		};

		qcom,kgsl-iommu@1f00000 {
			compatible = "qcom,kgsl-smmu-v2";
			reg = <0x1f00000 0x10000>;
			qcom,protect = <0xa000 0x1000>;
			clocks = <0xa 0x75eaefa5 0xa 0x59505e55 0xa 0xb432168e 0xa 0x18bb9a90>;
			clock-names = "scfg_clk", "gtcu_clk", "gtcu_iface_clk", "gtbu_clk";
			qcom,retention;
			phandle = <0x1ef>;
			gfx3d_user {
				compatible = "qcom,smmu-kgsl-cb";
				iommus = <0x9a 0x0>;
				qcom,gpu-offset = <0xa000>;
				phandle = <0x1f0>;
			};
		};

		qcom,vidc@1d00000 {
			compatible = "qcom,msm-vidc";
			reg = <0x1d00000 0xff000>;
			interrupts = <0x0 0x2c 0x0>;
			qcom,hfi-version = "3xx";
			venus-supply = <0x9b>;
			venus-core0-supply = <0x9c>;
			clocks = <0xa 0xf76a02bb 0xa 0x83a7f549 0xa 0x8d778c6 0xa 0xcdf4c8f6>;
			clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk";
			qcom,clock-configs = <0x1 0x0 0x0 0x0>;
			qcom,sw-power-collapse;
			qcom,slave-side-cp;
			qcom,dcvs-tbl = <0x1a5e0 0x1a5e0 0x3bc40 0x4 0x1a5e0 0x1a5e0 0x3bc40 0xc000000>;
			qcom,dcvs-limit = <0x1fe0 0x1e 0x1fe0 0x1e>;
			qcom,hfi = "venus";
			qcom,reg-presets = <0xe0020 0x5555556 0xe0024 0x5555556 0x80124 0x3>;
			qcom,qdss-presets = <0x826000 0x1000 0x827000 0x1000 0x822000 0x1000 0x803000 0x1000 0x9180000 0x1000 0x9181000 0x1000>;
			qcom,max-hw-load = <0x56220>;
			qcom,pm-qos-latency-us = <0x28b>;
			qcom,firmware-name = "venus";
			qcom,allowed-clock-rates = <0x12646790 0x12646790 0x12646790 0x1017df80 0xbebc200>;

			qcom,clock-freq-tbl {

				qcom,profile-enc {
					qcom,codec-mask = <0x55555555>;
					qcom,cycles-per-mb = <0x9a6>;
					qcom,low-power-mode-factor = <0x8000>;
				};

				qcom,profile-dec {
					qcom,codec-mask = <0xf3ffffff>;
					qcom,cycles-per-mb = <0x314>;
				};

				qcom,profile-hevcdec {
					qcom,codec-mask = <0xc000000>;
					qcom,cycles-per-mb = <0x3f7>;
				};
			};

			non_secure_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_ns";
				iommus = <0xe 0x800 0x0 0xe 0x807 0x0 0xe 0x808 0x27 0xe 0x811 0x20>;
				buffer-types = <0xfff>;
				virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>;
			};

			secure_bitstream_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_bitstream";
				iommus = <0xe 0x900 0x0 0xe 0x90a 0x4 0xe 0x909 0x22>;
				buffer-types = <0x241>;
				virtual-addr-pool = <0x4b000000 0x12c00000>;
				qcom,secure-context-bank;
			};

			secure_pixel_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_pixel";
				iommus = <0xe 0x90c 0x20>;
				buffer-types = <0x106>;
				virtual-addr-pool = <0x25800000 0x25800000>;
				qcom,secure-context-bank;
			};

			secure_non_pixel_cb {
				compatible = "qcom,msm-vidc,context-bank";
				label = "venus_sec_non_pixel";
				iommus = <0xe 0x940 0x0 0xe 0x907 0x8 0xe 0x908 0x20 0xe 0x90d 0x20>;
				buffer-types = <0x480>;
				virtual-addr-pool = <0x1000000 0x24800000>;
				qcom,secure-context-bank;
			};

			venus_bus_ddr {
				compatible = "qcom,msm-vidc,bus";
				label = "venus-ddr";
				qcom,bus-master = <0x3f>;
				qcom,bus-slave = <0x200>;
				qcom,bus-governor = "venus-ddr-gov";
				qcom,bus-range-kbps = <0x3e8 0xdfe08>;
			};

			arm9_bus_ddr {
				compatible = "qcom,msm-vidc,bus";
				label = "venus-arm9-ddr";
				qcom,bus-master = <0x3f>;
				qcom,bus-slave = <0x200>;
				qcom,bus-governor = "performance";
				qcom,bus-range-kbps = <0x1 0x1>;
			};
		};

		venus-ddr-gov {
			compatible = "qcom,msm-vidc,governor,table";
			status = "ok";

			qcom,bus-freq-table {

				qcom,profile-enc {
					qcom,codec-mask = <0x55555555>;
					qcom,load-busfreq-tbl = <0x3bc40 0xcd528 0x34bc0 0xb4aa0 0x2f760 0xa6040 0x23280 0x79180 0x1a5e0 0x5a550 0x17bb0 0x53020 0xbdd8 0x29810 0x11940 0x3c8c0 0x8ca0 0x1e460 0x4650 0x11170 0x2328 0x88b8 0x0 0x0>;
				};

				qcom,profile-dec {
					qcom,codec-mask = <0xffffffff>;
					qcom,load-busfreq-tbl = <0x3bc40 0x93b48 0x34bc0 0x83d60 0x2f760 0x762a0 0x23280 0x57e40 0x1a5e0 0x41eb0 0x17bb0 0x3b150 0xbdd8 0x1d8a8 0x11940 0x2bf20 0x8ca0 0x15f90 0x4650 0xafc8 0x0 0x0>;
				};
			};
		};

		interrupt-controller@b000000 {
			compatible = "qcom,msm-qgic2";
			interrupt-controller;
			interrupt-parent = <0x9d>;
			#interrupt-cells = <0x3>;
			reg = <0xb000000 0x1000 0xb002000 0x1000>;
			phandle = <0x9d>;
		};

		dcc@b3000 {
			compatible = "qcom,dcc";
			reg = <0xb3000 0x1000 0xb4000 0x2000>;
			reg-names = "dcc-base", "dcc-ram-base";
			clocks = <0xa 0xd1000c50>;
			clock-names = "apb_pclk";
			qcom,save-reg;
			phandle = <0x1f1>;
		};
		wake-gic {
			compatible = "qcom,mpm-gic-msm8937", "qcom,mpm-gic";
			interrupts = <0x0 0xab 0x1>;
			reg = <0x601d0 0x1000 0xb011008 0x4>;
			reg-names = "vmpm", "ipc";
			qcom,num-mpm-irqs = <0x40>;
			interrupt-controller;
			interrupt-parent = <0x9d>;
			#interrupt-cells = <0x3>;
			phandle = <0x1>;
		};

		wake-gpio {
			compatible = "qcom,mpm-gpio-msm8937", "qcom,mpm-gpio";
			interrupt-controller;
			interrupt-parent = <0x9d>;
			#interrupt-cells = <0x2>;
			phandle = <0x9>;
		};

		timer {
			compatible = "arm,armv8-timer";
			interrupts = <0x1 0x2 0xff08 0x1 0x3 0xff08 0x1 0x4 0xff08 0x1 0x1 0xff08>;
			clock-frequency = <0x124f800>;
		};

		qcom,sps {
			compatible = "qcom,msm_sps_4k";
			qcom,pipe-attr-ee;
		};

		thermal-zones {
			phandle = <0x1f2>;

			xo-therm-adc {
				polling-delay-passive = <0x0>;
				polling-delay = <0x1388>;
				thermal-sensors = <0x9e 0x32>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0xfde8>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			xo-therm-buf-adc {
				polling-delay-passive = <0x0>;
				polling-delay = <0x1388>;
				thermal-sensors = <0x9e 0x3c>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0xfde8>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			pa-therm0-adc {
				polling-delay-passive = <0x0>;
				polling-delay = <0x1388>;
				thermal-sensors = <0x9e 0x36>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0xfde8>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			aoss0-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "user_space";
				thermal-sensors = <0x9f 0x0>;

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			mdm-core-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "user_space";
				thermal-sensors = <0x9f 0x1>;

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			q6-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "user_space";
				thermal-sensors = <0x9f 0x2>;

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			camera-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "user_space";
				thermal-sensors = <0x9f 0x3>;

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			cpuss-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x4>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			apc1-cpu0-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x5>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			apc1-cpu1-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x6>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			apc1-cpu2-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x7>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};
			apc1-cpu3-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x8>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			gpu0-usr {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x9>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0x1e848>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			penta-cpu-max-step {
				polling-delay-passive = <0x32>;
				polling-delay = <0x64>;
				thermal-governor = "step_wise";

				trips {

					cpu-trip {
						temperature = <0x14c08>;
						hysteresis = <0x0>;
						type = "passive";
						phandle = <0xa0>;
					};
				};

				cooling-maps {

					cpu0_cdev {
						trip = <0xa0>;
						cooling-device = <0x2 0xffffffff 0xfffffffd>;
					};

					cpu1_cdev {
						trip = <0xa0>;
						cooling-device = <0x3 0xffffffff 0xfffffffd>;
					};

					cpu2_cdev {
						trip = <0xa0>;
						cooling-device = <0x4 0xffffffff 0xfffffffd>;
					};

					cpu3_cdev {
						trip = <0xa0>;
						cooling-device = <0x5 0xffffffff 0xfffffffd>;
					};
				};
			};

			gpu0-step {
				polling-delay-passive = <0xfa>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x9>;
				thermal-governor = "step_wise";

				trips {

					gpu-step-trip {
						temperature = <0x17318>;
						hysteresis = <0x0>;
						type = "passive";
						phandle = <0xa1>;
					};
				};

				cooling-maps {

					gpu_cdev0 {
						trip = <0xa1>;
						cooling-device = <0xa2 0xffffffff 0xffffffff>;
					};
				};
			};

			apc1-cpu0-step {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x5>;
				thermal-governor = "step_wise";

				trips {

					apc1-cpu0-trip {
						temperature = <0x19a28>;
						hysteresis = <0x3a98>;
						type = "passive";
						phandle = <0xa3>;
					};
				};

				cooling-maps {

					cpu0_cdev {
						trip = <0xa3>;
						cooling-device = <0x2 0xfffffffe 0xfffffffe>;
					};
				};
			};

			apc1-cpu1-step {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x6>;
				thermal-governor = "step_wise";

				trips {

					apc1-cpu1--trip {
						temperature = <0x19a28>;
						hysteresis = <0x3a98>;
						type = "passive";
						phandle = <0xa4>;
					};
				};

				cooling-maps {

					cpu1_cdev {
						trip = <0xa4>;
						cooling-device = <0x3 0xfffffffe 0xfffffffe>;
					};
				};
			};

			apc1-cpu2-step {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x7>;
				thermal-governor = "step_wise";

				trips {

					apc1-cpu2-trip {
						temperature = <0x19a28>;
						hysteresis = <0x3a98>;
						type = "passive";
						phandle = <0xa5>;
					};
				};

				cooling-maps {

					cpu2_cdev {
						trip = <0xa5>;
						cooling-device = <0x4 0xfffffffe 0xfffffffe>;
					};
				};
			};

			apc1-cpu3-step {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-sensors = <0x9f 0x8>;
				thermal-governor = "step_wise";

				trips {

					apc1-cpu3-trip {
						temperature = <0x19a28>;
						hysteresis = <0x3a98>;
						type = "passive";
						phandle = <0xa6>;
					};
				};

				cooling-maps {

					cpu3_cdev {
						trip = <0xa6>;
						cooling-device = <0x5 0xfffffffe 0xfffffffe>;
					};
				};
			};

			aoss0-lowf {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "low_limits_floor";
				thermal-sensors = <0x9f 0x0>;
				tracks-low;

				trips {

					aoss-lowf {
						temperature = <0x1388>;
						hysteresis = <0x1388>;
						type = "passive";
						phandle = <0xa7>;
					};
				};

				cooling-maps {

					cpu0_cdev {
						trip = <0xa7>;
						cooling-device = <0x2 0xfffffffc 0xfffffffc>;
					};

					cx_vdd_cdev {
						trip = <0xa7>;
						cooling-device = <0xa8 0x0 0x0>;
					};

					modem_vdd_cdev {
						trip = <0xa7>;
						cooling-device = <0xa9 0x0 0x0>;
					};
				};
			};

			skin-therm-adc {
				polling-delay-passive = <0x0>;
				polling-delay = <0x1388>;
				thermal-sensors = <0x9e 0x11>;
				thermal-governor = "user_space";

				trips {

					active-config0 {
						temperature = <0xfde8>;
						hysteresis = <0x3e8>;
						type = "passive";
					};
				};
			};

			pm8916_tz {
				polling-delay-passive = <0x0>;
				polling-delay = <0x0>;
				thermal-governor = "step_wise";
				thermal-sensors = <0xaa>;

				trips {

					pm8916-trip0 {
						temperature = <0x19a28>;
						hysteresis = <0x0>;
						type = "passive";
						phandle = <0x1f3>;
					};

					pm8916-trip1 {
						temperature = <0x1e848>;
						hysteresis = <0x0>;
						type = "passive";
						phandle = <0x1f4>;
					};

					pm8916-trip2 {
						temperature = <0x23668>;
						hysteresis = <0x0>;
						type = "passive";
						phandle = <0x1f5>;
					};
				};
			};
		};
		tsens@4a8000 {
			compatible = "qcom,msm8937-tsens";
			reg = <0x4a8000 0x1000 0x4a9000 0x1000 0xa4000 0x1000>;
			reg-names = "tsens_srot_physical", "tsens_tm_physical", "tsens_eeprom_physical";
			interrupts = <0x0 0xb8 0x0>;
			interrupt-names = "tsens-upper-lower";
			#thermal-sensor-cells = <0x1>;
			phandle = <0x9f>;
		};

		timer@b120000 {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0xb120000 0x1000>;
			clock-frequency = <0x124f800>;

			frame@b121000 {
				frame-number = <0x0>;
				interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>;
				reg = <0xb121000 0x1000 0xb122000 0x1000>;
			};

			frame@b123000 {
				frame-number = <0x1>;
				interrupts = <0x0 0x9 0x4>;
				reg = <0xb123000 0x1000>;
				status = "disabled";
			};

			frame@b124000 {
				frame-number = <0x2>;
				interrupts = <0x0 0xa 0x4>;
				reg = <0xb124000 0x1000>;
				status = "disabled";
			};

			frame@b125000 {
				frame-number = <0x3>;
				interrupts = <0x0 0xb 0x4>;
				reg = <0xb125000 0x1000>;
				status = "disabled";
			};

			frame@b126000 {
				frame-number = <0x4>;
				interrupts = <0x0 0xc 0x4>;
				reg = <0xb126000 0x1000>;
				status = "disabled";
			};

			frame@b127000 {
				frame-number = <0x5>;
				interrupts = <0x0 0xd 0x4>;
				reg = <0xb127000 0x1000>;
				status = "disabled";
			};

			frame@b128000 {
				frame-number = <0x6>;
				interrupts = <0x0 0xe 0x4>;
				reg = <0xb128000 0x1000>;
				status = "disabled";
			};
		};

		qcom,rmtfs_sharedmem@00000000 {
			compatible = "qcom,sharedmem-uio";
			reg = <0x0 0x180000>;
			reg-names = "rmtfs";
			qcom,client-id = <0x1>;
		};

		restart@4ab000 {
			compatible = "qcom,pshold";
			reg = <0x4ab000 0x4 0x193d100 0x4>;
			reg-names = "pshold-base", "tcsr-boot-misc-detect";
		};

		qcom,mpm2-sleep-counter@4a3000 {
			compatible = "qcom,mpm2-sleep-counter";
			reg = <0x4a3000 0x1000>;
			clock-frequency = <0x8000>;
		};

		cpu-pmu {
			compatible = "arm,armv8-pmuv3";
			interrupts = <0x1 0x7 0xff00>;
		};

		mem_dump {
			compatible = "qcom,mem-dump";
			memory-region = <0xab>;

			rpm_sw_dump {
				qcom,dump-size = <0x28000>;
				qcom,dump-id = <0xea>;
			};

			pmic_dump {
				qcom,dump-size = <0x10000>;
				qcom,dump-id = <0xe4>;
			};

			vsense_dump {
				qcom,dump-size = <0x1000>;
				qcom,dump-id = <0xe9>;
			};

			tmc_etf_dump {
				qcom,dump-size = <0x10000>;
				qcom,dump-id = <0xf0>;
			};

			tmc_etr_reg_dump {
				qcom,dump-size = <0x1000>;
				qcom,dump-id = <0x100>;
			};

			tmc_etf_reg_dump {
				qcom,dump-size = <0x1000>;
				qcom,dump-id = <0x101>;
			};

			misc_data_dump {
				qcom,dump-size = <0x1000>;
				qcom,dump-id = <0xe8>;
			};
		};

		slim@c140000 {
			cell-index = <0x1>;
			compatible = "qcom,slim-ngd";
			reg = <0xc140000 0x2c000 0xc104000 0x2a000>;
			reg-names = "slimbus_physical", "slimbus_bam_physical";
			interrupts = <0x0 0xa3 0x0 0x0 0xb4 0x0>;
			interrupt-names = "slimbus_irq", "slimbus_bam_irq";
			qcom,apps-ch-pipes = <0x600000>;
			qcom,ea-pc = <0x230>;
			status = "disabled";
			phandle = <0x1f6>;
		};

		serial@78b0000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x78b0000 0x200>;
			interrupts = <0x0 0x6c 0x0>;
			clocks = <0xa 0xf8a61c96 0xa 0x8caa5b4f>;
			clock-names = "core", "iface";
			status = "disabled";
			phandle = <0x1f7>;
		};

		uart@78af000 {
			compatible = "qcom,msm-hsuart-v14";
			#address-cells = <0x0>;
			#interrupt-cells = <0x1>;
			reg = <0x78af000 0x200 0x7884000 0x1f000>;
			reg-names = "core_mem", "bam_mem";
			interrupt-parent = <0xac>;
			interrupts = <0x0 0x1 0x2>;
			interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
			interrupt-map = <0x0 0x9d 0x0 0x6b 0x0 0x1 0x9d 0x0 0xee 0x0 0x2 0x15 0x1 0x0>;
			interrupt-map-mask = <0xffffffff>;
			qcom,inject-rx-on-wakeup;
			qcom,rx-char-to-inject = <0xfd>;
			qcom,bam-tx-ep-pipe-index = <0x0>;
			qcom,bam-rx-ep-pipe-index = <0x1>;
			qcom,master-id = <0x56>;
			clock-names = "core_clk", "iface_clk";
			clocks = <0xa 0xc7c62f90 0xa 0x8caa5b4f>;
			pinctrl-names = "sleep", "default";
			pinctrl-0 = <0xad>;
			pinctrl-1 = <0xae>;
			qcom,msm-bus,name = "blsp1_uart1";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x56 0x200 0x0 0x0 0x56 0x200 0x1f4 0x320>;
			status = "disabled";
			phandle = <0xac>;
		};

		qcom,sps-dma@7884000 {
			#dma-cells = <0x4>;
			compatible = "qcom,sps-dma";
			reg = <0x7884000 0x1f000>;
			interrupts = <0x0 0xee 0x0>;
			qcom,summing-threshold = <0xa>;
			phandle = <0xb1>;
		};

		qcom,sps-dma@7ac4000 {
			#dma-cells = <0x4>;
			compatible = "qcom,sps-dma";
			reg = <0x7ac4000 0x1f000>;
			interrupts = <0x0 0xef 0x0>;
			qcom,summing-threshold = <0xa>;
			phandle = <0xbe>;
		};

		i2c@78b8000 {
			compatible = "qcom,i2c-msm-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "qup_phys_addr";
			reg = <0x78b8000 0x600>;
			interrupt-names = "qup_irq";
			interrupts = <0x0 0x62 0x0>;
			qcom,clk-freq-out = <0x61a80>;
			qcom,clk-freq-in = <0x124f800>;
			clock-names = "iface_clk", "core_clk";
			clocks = <0xa 0x8caa5b4f 0xa 0xd7f40f6f>;
			pinctrl-names = "i2c_active", "i2c_sleep";
			pinctrl-0 = <0xaf>;
			pinctrl-1 = <0xb0>;
			qcom,noise-rjct-scl = <0x0>;
			qcom,noise-rjct-sda = <0x0>;
			qcom,master-id = <0x56>;
			dmas = <0xb1 0xa 0x40 0x20000020 0x20 0xb1 0xb 0x20 0x20000020 0x20>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x1f8>;
		};

		qcom,rpm-smd {
			compatible = "qcom,rpm-smd";
			rpm-channel-name = "rpm_requests";
			rpm-channel-type = <0xf>;
			phandle = <0x1f9>;

			rpm-regulator-smpa1 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "smpa";
				qcom,resource-id = <0x1>;
				qcom,regulator-type = <0x1>;
				qcom,hpm-min-load = <0x186a0>;
				status = "okay";

				regulator-s1 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s1";
					qcom,set = <0x3>;
					status = "disabled";
					phandle = <0x1fa>;
				};

				regulator-s1-level {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s1_level";
					qcom,set = <0x3>;
					regulator-min-microvolt = <0x10>;
					regulator-max-microvolt = <0x200>;
					qcom,use-voltage-level;
					phandle = <0xb3>;
				};

				regulator-s1-level-ao {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s1_level_ao";
					qcom,set = <0x1>;
					regulator-min-microvolt = <0x10>;
					regulator-max-microvolt = <0x200>;
					qcom,use-voltage-level;
					phandle = <0xb4>;
				};

				regulator-s1-floor-level {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s1_floor_level";
					qcom,set = <0x3>;
					regulator-min-microvolt = <0x10>;
					regulator-max-microvolt = <0x200>;
					qcom,use-voltage-floor-level;
					qcom,always-send-voltage;
					phandle = <0xb2>;
				};

				regulator-cx-cdev {
					compatible = "qcom,regulator-cooling-device";
					regulator-cdev-supply = <0xb2>;
					regulator-levels = <0x140 0x10>;
					#cooling-cells = <0x2>;
					phandle = <0xa8>;
				};
			};

			rpm-regulator-smpa2 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "smpa";
				qcom,resource-id = <0x2>;
				qcom,regulator-type = <0x1>;
				qcom,hpm-min-load = <0x186a0>;
				status = "disabled";

				regulator-s2 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s2";
					qcom,set = <0x3>;
					status = "disabled";
				};
			};

			rpm-regulator-smpa3 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "smpa";
				qcom,resource-id = <0x3>;
				qcom,regulator-type = <0x1>;
				qcom,hpm-min-load = <0x186a0>;
				status = "okay";

				regulator-s3 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s3";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0xf4240>;
					regulator-max-microvolt = <0x161840>;
					phandle = <0xea>;
				};
			};

			rpm-regulator-smpa4 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "smpa";
				qcom,resource-id = <0x4>;
				qcom,regulator-type = <0x1>;
				qcom,hpm-min-load = <0x186a0>;
				status = "okay";

				regulator-s4 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_s4";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1e6540>;
					regulator-max-microvolt = <0x20f580>;
					qcom,init-voltage = <0x1e6540>;
					phandle = <0xcc>;
				};
			};

			rpm-regulator-ldoa2 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x2>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";
				regulator-l2 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l2";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x7a120>;
					regulator-max-microvolt = <0x109a00>;
					phandle = <0xb>;
				};

				regulator-l2-level-ao {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l2_level_ao";
					qcom,set = <0x1>;
					regulator-min-microvolt = <0x10>;
					regulator-max-microvolt = <0x180>;
					qcom,use-voltage-level;
					phandle = <0xcf>;
				};

				regulator-l2-level-so {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l2_level_so";
					qcom,set = <0x2>;
					regulator-min-microvolt = <0x10>;
					regulator-max-microvolt = <0x180>;
					qcom,use-voltage-level;
					qcom,init-voltage-level = <0x10>;
					phandle = <0x1fb>;
				};
			};

			rpm-regulator-ldoa3 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x3>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l3 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l3";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x151e40>;
					phandle = <0xe0>;
				};
			};

			rpm-regulator-ldoa5 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x5>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l5 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l5";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					qcom,init-voltage = <0x1b7740>;
					phandle = <0xcd>;
				};
			};

			rpm-regulator-ldoa6 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x6>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l6 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l6";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1a9c80>;
					regulator-max-microvolt = <0x1d0d80>;
					qcom,init-voltage = <0x1a9c80>;
					phandle = <0x94>;
				};
			};

			rpm-regulator-ldoa7 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x7>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l7 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l7";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1d0d80>;
					qcom,init-voltage = <0x1b7740>;
					phandle = <0xc4>;
				};

				regulator-l7-ao {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l7_ao";
					qcom,set = <0x1>;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1d0d80>;
					qcom,init-voltage = <0x1b7740>;
					phandle = <0xb5>;
				};

				regulator-l7-so {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l7_so";
					qcom,set = <0x2>;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1d0d80>;
					qcom,init-enable = <0x0>;
					phandle = <0x1fc>;
				};
			};

			rpm-regulator-ldoa8 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x8>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l8 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l8";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x292340>;
					regulator-max-microvolt = <0x36ee80>;
					qcom,init-voltage = <0x292340>;
					phandle = <0x1fd>;
				};
			};

			rpm-regulator-ldoa9 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x9>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l9 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l9";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x2c4fc0>;
					regulator-max-microvolt = <0x338380>;
					qcom,init-voltage = <0x2c4fc0>;
					phandle = <0xe1>;
				};
			};

			rpm-regulator-ldoa10 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xa>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l10 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l10";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x2dc6c0>;
					qcom,init-voltage = <0x294280>;
					phandle = <0x1fe>;
				};
			};

			rpm-regulator-ldoa11 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xb>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l11 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l11";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x292340>;
					regulator-max-microvolt = <0x36ee80>;
					qcom,init-voltage = <0x292340>;
					phandle = <0x1ff>;
				};
			};

			rpm-regulator-ldoa12 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xc>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l12 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l12";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x192580>;
					regulator-max-microvolt = <0x2f5d00>;
					qcom,init-voltage = <0x192580>;
					phandle = <0x200>;
				};
			};

			rpm-regulator-ldoa13 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xd>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x1388>;
				status = "okay";

				regulator-l13 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l13";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x2d49c0>;
					regulator-max-microvolt = <0x2eff40>;
					qcom,init-voltage = <0x2d49c0>;
					phandle = <0xc5>;
				};
			};

			rpm-regulator-ldoa14 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xe>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x1388>;
				status = "okay";

				regulator-l14 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l14";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x2ea180>;
					qcom,init-voltage = <0x1b7740>;
					phandle = <0x201>;
				};
			};

			rpm-regulator-ldoa15 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0xf>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x1388>;
				status = "okay";

				regulator-l15 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l15";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x2ea180>;
					qcom,init-voltage = <0x1b7740>;
					phandle = <0x202>;
				};
			};

			rpm-regulator-ldoa16 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x10>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x1388>;
				status = "okay";

				regulator-l16 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l16";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x292340>;
					regulator-max-microvolt = <0x2b55c0>;
					qcom,init-voltage = <0x292340>;
					phandle = <0x203>;
				};
			};

			rpm-regulator-ldoa17 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x11>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l17 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l17";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x2dc6c0>;
					regulator-max-microvolt = <0x325aa0>;
					qcom,init-voltage = <0x2dc6c0>;
					phandle = <0x204>;
				};
			};

			rpm-regulator-ldoa1 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x1>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l1 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l1";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0xec540>;
					regulator-max-microvolt = <0x119400>;
					qcom,init-voltage = <0xec540>;
					phandle = <0x205>;
				};
			};

			rpm-regulator-ldoa4 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x4>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l4 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l4";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x1a9c80>;
					regulator-max-microvolt = <0x1cee40>;
					qcom,init-voltage = <0x1a9c80>;
					phandle = <0x206>;
				};
			};

			rpm-regulator-ldoa18 {
				compatible = "qcom,rpm-smd-regulator-resource";
				qcom,resource-name = "ldoa";
				qcom,resource-id = <0x12>;
				qcom,regulator-type = <0x0>;
				qcom,hpm-min-load = <0x2710>;
				status = "okay";

				regulator-l18 {
					compatible = "qcom,rpm-smd-regulator";
					regulator-name = "8916_l18";
					qcom,set = <0x3>;
					status = "okay";
					regulator-min-microvolt = <0x27ac40>;
					regulator-max-microvolt = <0x2ab980>;
					qcom,init-voltage = <0x27ac40>;
					phandle = <0x207>;
				};
			};
		};

		qcom,gcc@1800000 {
			compatible = "qcom,gcc-8917";
			reg = <0x1800000 0x80000 0xb016000 0x40 0xa6018 0x4>;
			reg-names = "cc_base", "apcs_c1_base", "efuse";
			vdd_dig-supply = <0xb3>;
			vdd_hf_dig-supply = <0xb4>;
			vdd_hf_pll-supply = <0xb5>;
			qcom,gfx3d_clk_src-opp-store-vcorner = <0xa2>;
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			phandle = <0xa>;
		};

		qcom,cc-debug@1874000 {
			compatible = "qcom,cc-debug-8917";
			reg = <0x1874000 0x4 0xb01101c 0x8>;
			reg-names = "cc_base", "meas";
			#clock-cells = <0x1>;
			phandle = <0xe5>;
		};

		qcom,gcc-mdss@1800000 {
			compatible = "qcom,gcc-mdss-8917";
			clocks = <0xb6 0x5767c287 0xb6 0x44539836>;
			clock-names = "pclk0_src", "byte0_src";
			#clock-cells = <0x1>;
			phandle = <0x92>;
		};

		qcom,cpu-clock-8939@b111050 {
			compatible = "qcom,cpu-clock-8917";
			reg = <0xb011050 0x8 0xa412c 0x8>;
			reg-names = "apcs-c1-rcg-base", "efuse";
			qcom,num-cluster;
			vdd-c1-supply = <0xb7>;
			clocks = <0xa 0x6b2fb034 0xa 0xfbc57bbd>;
			clock-names = "clk-c1-4", "clk-c1-5";
			qcom,speed0-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x4a62f800 0x3 0x53819040 0x4>;
			qcom,speed1-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x4a62f800 0x3 0x53819040 0x4 0x59439000 0x5>;
			qcom,speed2-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x48190800 0x3>;
			qcom,speed3-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x4a62f800 0x3 0x4dd1e000 0x4>;
			#clock-cells = <0x1>;
			phandle = <0x90>;
		};

		qcom,msm-cpufreq {
			compatible = "qcom,msm-cpufreq";
			clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk";
			clocks = <0x90 0xcf28e63a 0x90 0xcf28e63a 0x90 0xcf28e63a 0x90 0xcf28e63a>;
			qcom,cpufreq-table = <0xea600 0x10b300 0x127500 0x130b00 0x13ec00 0x1560a8 0x16da00>;
			phandle = <0x208>;
		};

		i2c@78b6000 {
			compatible = "qcom,i2c-msm-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "qup_phys_addr";
			reg = <0x78b6000 0x600>;
			interrupt-names = "qup_irq";
			interrupts = <0x0 0x60 0x0>;
			qcom,clk-freq-out = <0x61a80>;
			qcom,clk-freq-in = <0x124f800>;
			clock-names = "iface_clk", "core_clk";
			clocks = <0xa 0x8caa5b4f 0xa 0x1076f220>;
			pinctrl-names = "i2c_active", "i2c_sleep";
			pinctrl-0 = <0xb8>;
			pinctrl-1 = <0xb9>;
			qcom,noise-rjct-scl = <0x0>;
			qcom,noise-rjct-sda = <0x0>;
			qcom,master-id = <0x56>;
			dmas = <0xb1 0x6 0x40 0x20000020 0x20 0xb1 0x7 0x20 0x20000020 0x20>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x209>;
		};

		i2c@78b7000 {
			compatible = "qcom,i2c-msm-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "qup_phys_addr";
			reg = <0x78b7000 0x600>;
			interrupt-names = "qup_irq";
			interrupts = <0x0 0x61 0x0>;
			qcom,clk-freq-out = <0x61a80>;
			qcom,clk-freq-in = <0x124f800>;
			clock-names = "iface_clk", "core_clk";
			clocks = <0xa 0x8caa5b4f 0xa 0x9e25ac82>;
			pinctrl-names = "i2c_active", "i2c_sleep";
			pinctrl-0 = <0xba>;
			pinctrl-1 = <0xbb>;
			qcom,noise-rjct-scl = <0x0>;
			qcom,noise-rjct-sda = <0x0>;
			qcom,master-id = <0x56>;
			dmas = <0xb1 0x8 0x40 0x20000020 0x20 0xb1 0x9 0x20 0x20000020 0x20>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x20a>;
		};

		i2c@7af5000 {
			compatible = "qcom,i2c-msm-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "qup_phys_addr";
			reg = <0x7af5000 0x600>;
			interrupt-names = "qup_irq";
			interrupts = <0x0 0x12b 0x0>;
			qcom,clk-freq-out = <0x61a80>;
			qcom,clk-freq-in = <0x124f800>;
			clock-names = "iface_clk", "core_clk";
			clocks = <0xa 0x8f283c1d 0xa 0x9ace11dd>;
			pinctrl-names = "i2c_active", "i2c_sleep";
			pinctrl-0 = <0xbc>;
			pinctrl-1 = <0xbd>;
			qcom,noise-rjct-scl = <0x0>;
			qcom,noise-rjct-sda = <0x0>;
			qcom,master-id = <0x54>;
			dmas = <0xbe 0x4 0x40 0x20000020 0x20 0xbe 0x5 0x20 0x20000020 0x20>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x20b>;
		};

		spi@78b7000 {
			compatible = "qcom,spi-qup-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "spi_physical", "spi_bam_physical";
			reg = <0x78b7000 0x600 0x7884000 0x1f000>;
			interrupt-names = "spi_irq", "spi_bam_irq";
			interrupts = <0x0 0x61 0x0 0x0 0xee 0x0>;
			spi-max-frequency = <0x124f800>;
			pinctrl-names = "spi_default", "spi_sleep";
			pinctrl-0 = <0xbf 0xc0>;
			pinctrl-1 = <0xc1 0xc2>;
			clocks = <0xa 0x8caa5b4f 0xa 0xfb978880>;
			clock-names = "iface_clk", "core_clk";
			qcom,infinite-mode = <0x0>;
			qcom,use-bam;
			qcom,use-pinctrl;
			qcom,ver-reg-exists;
			qcom,bam-consumer-pipe-index = <0x8>;
			qcom,bam-producer-pipe-index = <0x9>;
			qcom,master-id = <0x56>;
			status = "disabled";
			phandle = <0x20c>;
		};

		usb@78db000 {
			compatible = "qcom,hsusb-otg";
			reg = <0x78db000 0x400 0x6c000 0x200>;
			reg-names = "core", "phy_csr";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>;
			interrupt-names = "core_irq", "async_irq";
			hsusb_vdd_dig-supply = <0xc3>;
			HSUSB_1p8-supply = <0xc4>;
			HSUSB_3p3-supply = <0xc5>;
			qcom,vdd-voltage-level = <0x0 0x124f80 0x124f80>;
			qcom,hsusb-otg-phy-type = <0x3>;
			qcom,hsusb-otg-mode = <0x3>;
			qcom,hsusb-otg-otg-control = <0x2>;
			qcom,dp-manual-pullup;
			qcom,phy-dvdd-always-on;
			qcom,boost-sysclk-with-streaming;
			qcom,axi-prefetch-enable;
			qcom,enable-sdp-typec-current-limit;
			qcom,hsusb-otg-delay-lpm;
			qcom,msm-bus,name = "usb2";
			qcom,msm-bus,num-cases = <0x3>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x57 0x200 0x0 0x0 0x57 0x200 0x13880 0x0 0x57 0x200 0x1770 0x1770>;
			clocks = <0xa 0x72ce8032 0xa 0xa11972e5 0xa 0x6caa736f 0xa 0xea410834 0xa 0x34b7821b 0xa 0x11d6a74e 0xa 0x996884d5 0xa 0x47179d 0xa 0xe13808fd 0xa 0x79bca5cc>;
			clock-names = "iface_clk", "core_clk", "sleep_clk", "bimc_clk", "snoc_clk", "pcnoc_clk", "phy_reset_clk", "phy_por_clk", "phy_csr_clk", "xo";
			qcom,bus-clk-rate = <0x237a0800 0xbebc200 0x5f5e100>;
			qcom,max-nominal-sysclk-rate = <0x7f27450>;
			resets = <0xa 0x2 0xa 0x4 0xa 0x3>;
			reset-names = "core_reset", "phy_reset", "phy_por_reset";
			extcon = <0xc6>;
			phandle = <0x20d>;

			qcom,usbbam@78c4000 {
				compatible = "qcom,usb-bam-msm";
				reg = <0x78c4000 0x17000>;
				interrupt-parent = <0x9d>;
				interrupts = <0x0 0x87 0x0>;
				qcom,bam-type = <0x1>;
				qcom,usb-bam-num-pipes = <0x4>;
				qcom,usb-bam-fifo-baseaddr = "\b`P";
				qcom,ignore-core-reset-ack;
				qcom,disable-clk-gating;
				qcom,usb-bam-max-mbps-highspeed = <0x190>;
				qcom,reset-bam-on-disconnect;

				qcom,pipe0 {
					label = "hsusb-qdss-in-0";
					qcom,usb-bam-mem-type = <0x2>;
					qcom,dir = <0x1>;
					qcom,pipe-num = <0x0>;
					qcom,peer-bam = <0x0>;
					qcom,peer-bam-physical-address = <0x6044000>;
					qcom,src-bam-pipe-index = <0x0>;
					qcom,dst-bam-pipe-index = <0x0>;
					qcom,data-fifo-offset = <0x0>;
					qcom,data-fifo-size = <0xe00>;
					qcom,descriptor-fifo-offset = <0xe00>;
					qcom,descriptor-fifo-size = <0x200>;
				};
			};
		};

		qcom,cpubw {
			compatible = "qcom,devbw";
			governor = "cpufreq";
			qcom,src-dst-ports = <0x1 0x200>;
			qcom,active-only;
			qcom,bw-tbl = <0x301 0x64b 0x8de 0xb71 0x1098 0x11bd 0x1406 0x160d>;
			phandle = <0xc7>;
		};

		qcom,mincpubw {
			compatible = "qcom,devbw";
			governor = "cpufreq";
			qcom,src-dst-ports = <0x1 0x200>;
			qcom,active-only;
			qcom,bw-tbl = <0x301 0x64b 0x8de 0xb71 0x1098 0x11bd 0x1406 0x160d>;
			phandle = <0xc8>;
		};

		qcom,cpu-bwmon {
			compatible = "qcom,bimc-bwmon2";
			reg = <0x408000 0x300 0x401000 0x200>;
			reg-names = "base", "global_base";
			interrupts = <0x0 0xb7 0x4>;
			qcom,mport = <0x0>;
			qcom,target-dev = <0xc7>;
		};

		devfreq-cpufreq {

			cpubw-cpufreq {
				target-dev = <0xc7>;
				cpu-to-dev-map = <0xf3c00 0x1098 0x10b300 0x11bd 0x13ec00 0x160d>;
			};

			mincpubw-cpufreq {
				target-dev = <0xc8>;
				cpu-to-dev-map = <0xf3c00 0x8de 0x13ec00 0x1098>;
			};
		};

		qcom,wdt@b017000 {
			compatible = "qcom,msm-watchdog";
			reg = <0xb017000 0x1000>;
			reg-names = "wdt-base";
			interrupts = <0x0 0x3 0x0 0x0 0x4 0x0>;
			qcom,bark-time = <0x2af8>;
			qcom,pet-time = <0x2710>;
			qcom,ipi-ping;
			qcom,wakeup-enable;
		};

		qcom,memshare {
			compatible = "qcom,memshare";

			qcom,client_1 {
				compatible = "qcom,memshare-peripheral";
				qcom,peripheral-size = <0x200000>;
				qcom,client-id = <0x0>;
				qcom,allocate-boot-time;
				label = "modem";
			};

			qcom,client_2 {
				compatible = "qcom,memshare-peripheral";
				qcom,peripheral-size = <0x300000>;
				qcom,client-id = <0x2>;
				label = "modem";
			};

			qcom,client_3 {
				compatible = "qcom,memshare-peripheral";
				qcom,peripheral-size = <0x0>;
				qcom,client-id = <0x1>;
				label = "modem";
				phandle = <0x20e>;
			};
		};

		qcom,spmi@200f000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0x200f000 0x1000 0x2400000 0x800000 0x2c00000 0x800000 0x3800000 0x200000 0x200a000 0x2100>;
			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
			interrupt-names = "periph_irq";
			interrupts = <0x0 0xbe 0x0>;
			qcom,ee = <0x0>;
			qcom,channel = <0x0>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			interrupt-controller;
			#interrupt-cells = <0x4>;
			cell-index = <0x0>;
			phandle = <0xcb>;
			pm8916@0 {
				compatible = "qcom,pm8916", "qcom,spmi-pmic";
				reg = <0x0 0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				phandle = <0x20f>;

				qcom,revid@100 {
					compatible = "qcom,qpnp-revid";
					reg = <0x100 0x100>;
					phandle = <0xc9>;
				};

				qcom,power-on@800 {
					compatible = "qcom,qpnp-power-on";
					reg = <0x800 0x100>;
					interrupts = <0x0 0x8 0x0 0x0 0x0 0x8 0x1 0x0>;
					interrupt-names = "kpdpwr", "resin";
					qcom,pon-dbc-delay = <0x3d09>;
					qcom,system-reset;
					qcom,clear-warm-reset;
					qcom,store-hard-reset-reason;
					phandle = <0x210>;

					qcom,pon_1 {
						qcom,pon-type = <0x0>;
						qcom,support-reset = <0x1>;
						qcom,pull-up = <0x1>;
						qcom,s1-timer = <0x2810>;
						qcom,s2-timer = <0x7d0>;
						qcom,s2-type = <0x1>;
						linux,code = <0x74>;
					};

					qcom,pon_2 {
						qcom,pon-type = <0x1>;
						qcom,pull-up = <0x1>;
						linux,code = <0x72>;
					};
				};

				pinctrl@c000 {
					compatible = "qcom,pm8916-gpio";
					reg = <0xc000 0x400>;
					gpio-controller;
					#gpio-cells = <0x2>;
					interrupts = <0x0 0xc0 0x0 0x0 0x0 0xc1 0x0 0x0 0x0 0xc2 0x0 0x0 0x0 0xc3 0x0 0x0>;
					interrupt-names = "pm8916_gpio1", "pm8916_gpio2", "pm8916_gpio3", "pm8916_gpio4";
					phandle = <0xe8>;

					disp_vdda_en_default {
						pins = "gpio3";
						function = "normal";
						power-source = <0x0>;
						drive-strength = <0x8>;
						output-high;
						phandle = <0xe9>;
					};
				};

				mpps@a000 {
					compatible = "qcom,pm8916-mpp";
					reg = <0xa000 0x400>;
					gpio-controller;
					#gpio-cells = <0x2>;
					interrupts = <0x0 0xa0 0x0 0x0 0x0 0xa1 0x0 0x0 0x0 0xa2 0x0 0x0 0x0 0xa3 0x0 0x0>;
					interrupt-names = "pm8916_mpp1", "pm8916_mpp2", "pm8916_mpp3", "pm8916_mpp4";
					phandle = <0x211>;
				};
				qcom,coincell@2800 {
					compatible = "qcom,qpnp-coincell";
					reg = <0x2800 0x100>;
					phandle = <0x212>;
				};

				qcom,pm8916_rtc {
					compatible = "qcom,qpnp-rtc";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					qcom,qpnp-rtc-write = <0x0>;
					qcom,qpnp-rtc-alarm-pwrup = <0x0>;
					phandle = <0x213>;

					qcom,pm8916_rtc_rw@6000 {
						reg = <0x6000 0x100>;
					};

					qcom,pm8916_rtc_alarm@6100 {
						reg = <0x6100 0x100>;
						interrupts = <0x0 0x61 0x1 0x0>;
					};
				};

				vadc@3100 {
					compatible = "qcom,qpnp-vadc";
					reg = <0x3100 0x100>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					interrupts = <0x0 0x31 0x0 0x1>;
					interrupt-names = "eoc-int-en-set";
					qcom,adc-bit-resolution = <0xf>;
					qcom,adc-vdd-reference = <0x708>;
					qcom,vadc-poll-eoc;
					qcom,pmic-revid = <0xc9>;
					#thermal-sensor-cells = <0x1>;
					phandle = <0x9e>;

					chan@8 {
						label = "die_temp";
						reg = <0x8>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x3>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@9 {
						label = "ref_625mv";
						reg = <0x9>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@a {
						label = "ref_1250v";
						reg = <0xa>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@0 {
						label = "usb_in";
						reg = <0x0>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x7>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@2 {
						label = "ireg_fb";
						reg = <0x2>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x6>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@5 {
						label = "vcoin";
						reg = <0x5>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x1>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@6 {
						label = "vbat_sns";
						reg = <0x6>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x1>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@7 {
						label = "vph_pwr";
						reg = <0x7>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x1>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@b {
						label = "chg_temp";
						reg = <0xb>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x3>;
						qcom,hw-settle-time = <0x0>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@11 {
						label = "skin_therm";
						reg = <0x11>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x2>;
						qcom,hw-settle-time = <0x2>;
						qcom,fast-avg-setup = <0x0>;
						qcom,vadc-thermal-node;
					};

					chan@30 {
						label = "batt_therm";
						reg = <0x30>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x1a>;
						qcom,hw-settle-time = <0xb>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@31 {
						label = "batt_id";
						reg = <0x31>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0xb>;
						qcom,fast-avg-setup = <0x0>;
					};

					chan@36 {
						label = "pa_therm0";
						reg = <0x36>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x2>;
						qcom,hw-settle-time = <0x2>;
						qcom,fast-avg-setup = <0x0>;
						qcom,vadc-thermal-node;
					};

					chan@32 {
						label = "xo_therm";
						reg = <0x32>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x4>;
						qcom,hw-settle-time = <0x2>;
						qcom,fast-avg-setup = <0x0>;
						qcom,vadc-thermal-node;
					};

					chan@3c {
						label = "xo_therm_buf";
						reg = <0x3c>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x4>;
						qcom,hw-settle-time = <0x2>;
						qcom,fast-avg-setup = <0x0>;
						qcom,vadc-thermal-node;
					};
				};

				qcom,temp-alarm@2400 {
					compatible = "qcom,qpnp-temp-alarm";
					reg = <0x2400 0x100>;
					interrupts = <0x0 0x24 0x0 0x1>;
					label = "pm8916_tz";
					qcom,channel-num = <0x8>;
					qcom,threshold-set = <0x0>;
					qcom,temp_alarm-vadc = <0x9e>;
					#thermal-sensor-cells = <0x0>;
					phandle = <0xaa>;
				};

				vadc@3400 {
					compatible = "qcom,qpnp-adc-tm";
					reg = <0x3400 0x100>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					interrupts = <0x0 0x34 0x0 0x1 0x0 0x34 0x3 0x1 0x0 0x34 0x4 0x1>;
					interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set";
					qcom,adc-bit-resolution = <0xf>;
					qcom,adc-vdd-reference = <0x708>;
					qcom,adc_tm-vadc = <0x9e>;
					qcom,pmic-revid = <0xc9>;
					phandle = <0xca>;

					chan@30 {
						label = "batt_therm";
						reg = <0x30>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x0>;
						qcom,calibration-type = "ratiometric";
						qcom,scale-function = <0x8>;
						qcom,hw-settle-time = <0xb>;
						qcom,fast-avg-setup = <0x2>;
						qcom,btm-channel-number = <0x48>;
					};

					chan@6 {
						label = "vbat_sns";
						reg = <0x6>;
						qcom,decimation = <0x0>;
						qcom,pre-div-channel-scaling = <0x1>;
						qcom,calibration-type = "absolute";
						qcom,scale-function = <0x0>;
						qcom,hw-settle-time = <0xb>;
						qcom,fast-avg-setup = <0x2>;
						qcom,btm-channel-number = <0x68>;
					};
				};

				qcom,charger {
					compatible = "qcom,qpnp-linear-charger";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					qcom,vddmax-mv = <0x1068>;
					qcom,vddsafe-mv = <0x1068>;
					qcom,vinmin-mv = <0x10d4>;
					qcom,ibatsafe-ma = <0x5a0>;
					qcom,thermal-mitigation = <0x5a0 0x2d0 0x276 0x0>;
					qcom,cool-bat-decidegc = <0x64>;
					qcom,warm-bat-decidegc = <0x1c2>;
					qcom,cool-bat-mv = <0x1004>;
					qcom,warm-bat-mv = <0x1004>;
					qcom,ibatmax-warm-ma = <0x168>;
					qcom,ibatmax-cool-ma = <0x168>;
					qcom,batt-hot-percentage = <0x19>;
					qcom,batt-cold-percentage = <0x50>;
					qcom,tchg-mins = <0xe8>;
					qcom,resume-soc = <0x63>;
					qcom,chg-vadc = <0x9e>;
					qcom,chg-adc_tm = <0xca>;
					status = "disabled";
					phandle = <0xc6>;

					qcom,chgr@1000 {
						reg = <0x1000 0x100>;
						interrupts = <0x0 0x10 0x7 0x1 0x0 0x10 0x6 0x1 0x0 0x10 0x5 0x3 0x0 0x10 0x0 0x2>;
						interrupt-names = "chg-done", "chg-failed", "fast-chg-on", "vbat-det-lo";
					};

					qcom,bat-if@1200 {
						reg = <0x1200 0x100>;
						interrupts = <0x0 0x12 0x1 0x3 0x0 0x12 0x0 0x3>;
						interrupt-names = "bat-temp-ok", "batt-pres";
					};

					qcom,usb-chgpth@1300 {
						reg = <0x1300 0x100>;
						interrupts = <0x0 0x13 0x4 0x3 0x0 0x13 0x2 0x1 0x0 0x13 0x1 0x3>;
						interrupt-names = "usb-over-temp", "chg-gone", "usbin-valid";
					};

					qcom,chg-misc@1600 {
						reg = <0x1600 0x100>;
					};
				};

				qcom,vmbms {
					compatible = "qcom,qpnp-vm-bms";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					status = "disabled";
					qcom,v-cutoff-uv = <0x33e140>;
					qcom,max-voltage-uv = <0x401640>;
					qcom,r-conn-mohm = <0x0>;
					qcom,shutdown-soc-valid-limit = <0x64>;
					qcom,low-soc-calculate-soc-threshold = <0xf>;
					qcom,low-voltage-calculate-soc-ms = <0x3e8>;
					qcom,low-soc-calculate-soc-ms = <0x1388>;
					qcom,calculate-soc-ms = <0x4e20>;
					qcom,volatge-soc-timeout-ms = <0xea60>;
					qcom,low-voltage-threshold = <0x34a490>;
					qcom,s3-ocv-tolerence-uv = <0x4b0>;
					qcom,s2-fifo-length = <0x5>;
					qcom,low-soc-fifo-length = <0x2>;
					qcom,bms-vadc = <0x9e>;
					qcom,bms-adc_tm = <0xca>;
					qcom,pmic-revid = <0xc9>;
					qcom,force-s3-on-suspend;
					qcom,force-s2-in-charging;
					qcom,report-charger-eoc;
					phandle = <0x214>;

					qcom,batt-pres-status@1208 {
						reg = <0x1208 0x1>;
					};

					qcom,qpnp-chg-pres@1008 {
						reg = <0x1008 0x1>;
					};

					qcom,vm-bms@4000 {
						reg = <0x4000 0x100>;
						interrupts = <0x0 0x40 0x0 0x0 0x0 0x40 0x1 0x0 0x0 0x40 0x2 0x0 0x0 0x40 0x3 0x0 0x0 0x40 0x4 0x0 0x0 0x40 0x5 0x0>;
						interrupt-names = "leave_cv", "enter_cv", "good_ocv", "ocv_thr", "fifo_update_done", "fsm_state_change";
					};
				};

				qcom,leds@a100 {
					compatible = "qcom,leds-qpnp";
					reg = <0xa100 0x100>;
					label = "mpp";
					phandle = <0x215>;
				};
			};

			pm8916@1 {
				compatible = "qcom,pm8916", "qcom,spmi-pmic";
				reg = <0x1 0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				phandle = <0x216>;

				qcom,pwms@bc00 {
					compatible = "qcom,pwm-lpg";
					reg = <0xbc00 0x100>;
					reg-names = "lpg-base";
					#pwm-cells = <0x2>;
					phandle = <0x217>;
				};

				qcom,vibrator@c000 {
					compatible = "qcom,qpnp-vibrator";
					reg = <0xc000 0x100>;
					label = "vibrator";
					status = "disabled";
					phandle = <0x218>;
				};

				msm8x16_wcd_codec@f100 {
					compatible = "qcom,msm8x16_wcd_codec";
					reg = <0xf100 0x100>;
					interrupt-parent = <0xcb>;
					interrupts = <0x1 0xf1 0x0 0x0 0x1 0xf1 0x1 0x0 0x1 0xf1 0x2 0x0 0x1 0xf1 0x3 0x0 0x1 0xf1 0x4 0x0 0x1 0xf1 0x5 0x0>;
					interrupt-names = "ear_ocp_int", "hphr_ocp_int", "hphl_ocp_det", "ear_cnp_int", "hphr_cnp_int", "hphl_cnp_int";
					phandle = <0x219>;
				};

				spm-regulator@1700 {
					compatible = "qcom,spm-regulator";
					regulator-name = "8916_s2";
					reg = <0x1700 0x100>;
					regulator-min-microvolt = <0x100590>;
					regulator-max-microvolt = <0x149970>;
					phandle = <0xe6>;
				};

				analog-codec@f000 {
					status = "okay";
					compatible = "qcom,pmic-analog-codec";
					reg = <0xf000 0x200>;
					#address-cells = <0x2>;
					#size-cells = <0x0>;
					interrupt-parent = <0xcb>;
					interrupts = <0x1 0xf0 0x0 0x0 0x1 0xf0 0x1 0x0 0x1 0xf0 0x2 0x0 0x1 0xf0 0x3 0x0 0x1 0xf0 0x4 0x0 0x1 0xf0 0x5 0x0 0x1 0xf0 0x6 0x0 0x1 0xf0 0x7 0x0 0x1 0xf1 0x0 0x0 0x1 0xf1 0x1 0x0 0x1 0xf1 0x2 0x0 0x1 0xf1 0x3 0x0 0x1 0xf1 0x4 0x0 0x1 0xf1 0x5 0x0>;
					interrupt-names = "spk_cnp_int", "spk_clip_int", "spk_ocp_int", "ins_rem_det1", "but_rel_det", "but_press_det", "ins_rem_det", "mbhc_int", "ear_ocp_int", "hphr_ocp_int", "hphl_ocp_det", "ear_cnp_int", "hphr_cnp_int", "hphl_cnp_int";
					cdc-vdd-pa-cp-supply = <0xcc>;
					qcom,cdc-vdd-pa-cp-voltage = <0x1f47d0 0x1f47d0>;
					qcom,cdc-vdd-pa-cp-current = <0x86470>;
					cdc-vdd-io-supply = <0xcd>;
					qcom,cdc-vdd-io-voltage = <0x1b7740 0x1b7740>;
					qcom,cdc-vdd-io-current = <0x1388>;
					cdc-vdda-h-supply = <0xcd>;
					qcom,cdc-vdda-h-voltage = <0x1b7740 0x1b7740>;
					qcom,cdc-vdda-h-current = <0x2710>;
					cdc-vdd-mic-bias-supply = <0xc5>;
					qcom,cdc-vdd-mic-bias-voltage = <0x2eebb8 0x2eebb8>;
					qcom,cdc-vdd-mic-bias-current = <0x1388>;
					qcom,cdc-mclk-clk-rate = <0x927c00>;
					qcom,cdc-static-supplies = "cdc-vdd-io", "cdc-vdd-pa-cp", "cdc-vdda-h";
					qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias";
					phandle = <0x116>;

					msm-dig-codec {
						compatible = "qcom,msm-digital-codec";
						reg = <0xc0f0000 0x0>;
						phandle = <0x115>;
					};
				};
			};
		};

		qcom,msm-rtb {
			compatible = "qcom,msm-rtb";
			qcom,rtb-size = <0x100000>;
		};

		qcom,msm-imem@8600000 {
			compatible = "qcom,msm-imem";
			reg = <0x8600000 0x1000>;
			ranges = <0x0 0x8600000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			mem_dump_table@10 {
				compatible = "qcom,msm-imem-mem_dump_table";
				reg = <0x10 0x8>;
			};

			dload_type@1c {
				compatible = "qcom,msm-imem-dload-type";
				reg = <0x1c 0x4>;
			};

			restart_reason@65c {
				compatible = "qcom,msm-imem-restart_reason";
				reg = <0x65c 0x4>;
			};

			boot_stats@6b0 {
				compatible = "qcom,msm-imem-boot_stats";
				reg = <0x6b0 0x20>;
			};

			kaslr_offset@6d0 {
				compatible = "qcom,msm-imem-kaslr_offset";
				reg = <0x6d0 0xc>;
			};

			pil@94c {
				compatible = "qcom,msm-imem-pil";
				reg = <0x94c 0xc8>;
			};

			diag_dload@c8 {
				compatible = "qcom,msm-imem-diag-dload";
				reg = <0xc8 0xc8>;
			};
		};

		jtagfuse@a601c {
			compatible = "qcom,jtag-fuse-v2";
			reg = <0xa601c 0x8>;
			reg-names = "fuse-base";
			phandle = <0x21a>;
		};

		jtagmm@61bc000 {
			compatible = "qcom,jtagv8-mm";
			reg = <0x61bc000 0x1000 0x61b0000 0x1000>;
			reg-names = "etm-base", "debug-base";
			qcom,coresight-jtagmm-cpu = <0x2>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "core_clk", "core_a_clk";
			phandle = <0x21b>;
		};

		jtagmm@61bd000 {
			compatible = "qcom,jtagv8-mm";
			reg = <0x61bd000 0x1000 0x61b2000 0x1000>;
			reg-names = "etm-base", "debug-base";
			qcom,coresight-jtagmm-cpu = <0x3>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "core_clk", "core_a_clk";
			phandle = <0x21c>;
		};

		jtagmm@61be000 {
			compatible = "qcom,jtagv8-mm";
			reg = <0x61be000 0x1000 0x61b4000 0x1000>;
			reg-names = "etm-base", "debug-base";
			qcom,coresight-jtagmm-cpu = <0x4>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "core_clk", "core_a_clk";
			phandle = <0x21d>;
		};

		jtagmm@61bf000 {
			compatible = "qcom,jtagv8-mm";
			reg = <0x61bf000 0x1000 0x61b6000 0x1000>;
			reg-names = "etm-base", "debug-base";
			qcom,coresight-jtagmm-cpu = <0x5>;
			clocks = <0xa 0x1492202a 0xa 0xdd121669>;
			clock-names = "core_clk", "core_a_clk";
			phandle = <0x21e>;
		};

		qcom,ipc-spinlock@1905000 {
			compatible = "qcom,ipc-spinlock-sfpb";
			reg = <0x1905000 0x8000>;
			qcom,num-locks = <0x8>;
		};

		qcom,smem@86300000 {
			compatible = "qcom,smem";
			reg = <0x86300000 0x100000 0xb011008 0x4 0x60000 0x8000 0x193d000 0x8>;
			reg-names = "smem", "irq-reg-base", "aux-mem1", "smem_targ_info_reg";
			qcom,mpu-enabled;

			qcom,smd-modem {
				compatible = "qcom,smd";
				qcom,smd-edge = <0x0>;
				qcom,smd-irq-offset = <0x0>;
				qcom,smd-irq-bitmask = <0x1000>;
				interrupts = <0x0 0x19 0x1>;
				label = "modem";
				qcom,not-loadable;
			};

			qcom,smsm-modem {
				compatible = "qcom,smsm";
				qcom,smsm-edge = <0x0>;
				qcom,smsm-irq-offset = <0x0>;
				qcom,smsm-irq-bitmask = <0x2000>;
				interrupts = <0x0 0x1a 0x1>;
			};

			qcom,smd-wcnss {
				compatible = "qcom,smd";
				qcom,smd-edge = <0x6>;
				qcom,smd-irq-offset = <0x0>;
				qcom,smd-irq-bitmask = <0x20000>;
				interrupts = <0x0 0x8e 0x1>;
				label = "wcnss";
			};

			qcom,smsm-wcnss {
				compatible = "qcom,smsm";
				qcom,smsm-edge = <0x6>;
				qcom,smsm-irq-offset = <0x0>;
				qcom,smsm-irq-bitmask = <0x80000>;
				interrupts = <0x0 0x90 0x1>;
			};

			qcom,smd-adsp {
				compatible = "qcom,smd";
				qcom,smd-edge = <0x1>;
				qcom,smd-irq-offset = <0x0>;
				qcom,smd-irq-bitmask = <0x100>;
				interrupts = <0x0 0x121 0x1>;
				label = "adsp";
			};

			qcom,smsm-adsp {
				compatible = "qcom,smsm";
				qcom,smsm-edge = <0x1>;
				qcom,smsm-irq-offset = <0x0>;
				qcom,smsm-irq-bitmask = <0x200>;
				interrupts = <0x0 0x122 0x1>;
			};

			qcom,smd-rpm {
				compatible = "qcom,smd";
				qcom,smd-edge = <0xf>;
				qcom,smd-irq-offset = <0x0>;
				qcom,smd-irq-bitmask = <0x1>;
				interrupts = <0x0 0xa8 0x1>;
				label = "rpm";
				qcom,irq-no-suspend;
				qcom,not-loadable;
			};
		};

		qcom,smdtty {
			compatible = "qcom,smdtty";

			qcom,smdtty-apps-fm {
				qcom,smdtty-remote = "wcnss";
				qcom,smdtty-port-name = "APPS_FM";
				phandle = <0x21f>;
			};

			smdtty-apps-riva-bt-acl {
				qcom,smdtty-remote = "wcnss";
				qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
				phandle = <0x220>;
			};

			qcom,smdtty-apps-riva-bt-cmd {
				qcom,smdtty-remote = "wcnss";
				qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
				phandle = <0x221>;
			};

			qcom,smdtty-mbalbridge {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "MBALBRIDGE";
				phandle = <0x222>;
			};

			smdtty-apps-riva-ant-cmd {
				qcom,smdtty-remote = "wcnss";
				qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
				phandle = <0x223>;
			};

			smdtty-apps-riva-ant-data {
				qcom,smdtty-remote = "wcnss";
				qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
				phandle = <0x224>;
			};

			qcom,smdtty-data1 {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "DATA1";
				phandle = <0x225>;
			};

			qcom,smdtty-data4 {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "DATA4";
				phandle = <0x226>;
			};

			qcom,smdtty-data11 {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "DATA11";
				phandle = <0x227>;
			};

			qcom,smdtty-data21 {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "DATA21";
				phandle = <0x228>;
			};

			smdtty-loopback {
				qcom,smdtty-remote = "modem";
				qcom,smdtty-port-name = "LOOPBACK";
				qcom,smdtty-dev-name = "LOOPBACK_TTY";
				phandle = <0x229>;
			};
		};

		qcom,smdpkt {
			compatible = "qcom,smdpkt";

			qcom,smdpkt-data5-cntl {
				qcom,smdpkt-remote = "modem";
				qcom,smdpkt-port-name = "DATA5_CNTL";
				qcom,smdpkt-dev-name = "smdcntl0";
			};

			qcom,smdpkt-data22 {
				qcom,smdpkt-remote = "modem";
				qcom,smdpkt-port-name = "DATA22";
				qcom,smdpkt-dev-name = "smd22";
			};

			qcom,smdpkt-data40-cntl {
				qcom,smdpkt-remote = "modem";
				qcom,smdpkt-port-name = "DATA40_CNTL";
				qcom,smdpkt-dev-name = "smdcntl8";
			};

			qcom,smdpkt-data2 {
				qcom,smdpkt-remote = "modem";
				qcom,smdpkt-port-name = "DATA2";
				qcom,smdpkt-dev-name = "at_mdm0";
			};

			qcom,smdpkt-apr-apps2 {
				qcom,smdpkt-remote = "adsp";
				qcom,smdpkt-port-name = "apr_apps2";
				qcom,smdpkt-dev-name = "apr_apps2";
			};

			qcom,smdpkt-loopback {
				qcom,smdpkt-remote = "modem";
				qcom,smdpkt-port-name = "LOOPBACK";
				qcom,smdpkt-dev-name = "smd_pkt_loopback";
			};
		};

		tz-log@8600720 {
			compatible = "qcom,tz-log";
			reg = "\b`\a ", "", " ";
			phandle = <0x22a>;
		};

		qcom,ipc_router {
			compatible = "qcom,ipc_router";
			qcom,node-id = <0x1>;
		};

		qcom,ipc_router_modem_xprt {
			compatible = "qcom,ipc_router_smd_xprt";
			qcom,ch-name = "IPCRTR";
			qcom,xprt-remote = "modem";
			qcom,xprt-linkid = <0x1>;
			qcom,xprt-version = <0x1>;
			qcom,fragmented-data;
			qcom,disable-pil-loading;
		};

		qcom,ipc_router_q6_xprt {
			compatible = "qcom,ipc_router_smd_xprt";
			qcom,ch-name = "IPCRTR";
			qcom,xprt-remote = "adsp";
			qcom,xprt-linkid = <0x1>;
			qcom,xprt-version = <0x1>;
			qcom,fragmented-data;
		};

		qcom,ipc_router_wcnss_xprt {
			compatible = "qcom,ipc_router_smd_xprt";
			qcom,ch-name = "IPCRTR";
			qcom,xprt-remote = "wcnss";
			qcom,xprt-linkid = <0x1>;
			qcom,xprt-version = <0x1>;
			qcom,fragmented-data;
		};

		qcom,bam_dmux@4044000 {
			compatible = "qcom,bam_dmux";
			reg = <0x4044000 0x19000>;
			interrupts = <0x0 0xa2 0x1>;
			qcom,rx-ring-size = <0x20>;
			qcom,max-rx-mtu = <0x1000>;
			qcom,fast-shutdown;
			qcom,no-cpu-affinity;
			phandle = <0x22b>;
		};

		sdcc1ice@7803000 {
			compatible = "qcom,ice";
			reg = <0x7803000 0x8000>;
			interrupt-names = "sdcc_ice_nonsec_level_irq", "sdcc_ice_sec_level_irq";
			interrupts = <0x0 0x138 0x0 0x0 0x139 0x0>;
			qcom,enable-ice-clk;
			clock-names = "ice_core_clk_src", "ice_core_clk", "bus_clk", "iface_clk";
			clocks = <0xa 0xfd6a4301 0xa 0xfd5680a 0xa 0x9ad6fb96 0xa 0x691e0caa>;
			qcom,op-freq-hz = <0xbebc200 0x0 0x0 0x0>;
			qcom,msm-bus,name = "sdcc_ice_noc";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x3e8 0x0>;
			qcom,bus-vector-names = "MIN", "MAX";
			qcom,instance-type = "sdcc";
			phandle = <0xce>;
		};

		sdhci@7824900 {
			compatible = "qcom,sdhci-msm";
			reg = <0x7824900 0x500 0x7824000 0x800 0x7824e00 0x200>;
			reg-names = "hc_mem", "core_mem", "cmdq_mem";
			interrupts = <0x0 0x7b 0x0 0x0 0x8a 0x0>;
			interrupt-names = "hc_irq", "pwr_irq";
			sdhc-msm-crypto = <0xce>;
			qcom,bus-width = <0x8>;
			qcom,large-address-bus;
			qcom,devfreq,freq-table = <0x2faf080 0xbebc200>;
			qcom,pm-qos-irq-type = "affine_irq";
			qcom,pm-qos-irq-latency = <0xd 0x28b>;
			qcom,pm-qos-cpu-groups = <0xf>;
			qcom,pm-qos-cmdq-latency-us = <0xd 0x28b>;
			qcom,pm-qos-legacy-latency-us = <0xd 0x28b>;
			qcom,msm-bus,name = "sdhc1";
			qcom,msm-bus,num-cases = <0x9>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x416 0xc80 0x4e 0x200 0xcc3e 0x27100 0x4e 0x200 0xff50 0x30d40 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x146cc2 0x3e8000>;
			qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>;
			clocks = <0xa 0x691e0caa 0xa 0x9ad6fb96 0xa 0xfd5680a>;
			clock-names = "iface_clk", "core_clk", "ice_core_clk";
			qcom,ice-clk-rates = <0xbebc200 0x5f5e100>;
			qcom,scaling-lower-bus-speed-mode = "DDR52";
			status = "disabled";
			phandle = <0x22c>;
		};

		sdhci@7864900 {
			compatible = "qcom,sdhci-msm";
			reg = <0x7864900 0x500 0x7864000 0x800>;
			reg-names = "hc_mem", "core_mem";
			interrupts = <0x0 0x7d 0x0 0x0 0xdd 0x0>;
			interrupt-names = "hc_irq", "pwr_irq";
			qcom,bus-width = <0x4>;
			qcom,large-address-bus;
			qcom,pm-qos-irq-type = "affine_irq";
			qcom,pm-qos-irq-latency = <0xd 0x28b>;
			qcom,pm-qos-cpu-groups = <0xf>;
			qcom,pm-qos-legacy-latency-us = <0xd 0x28b>;
			qcom,msm-bus,name = "sdhc2";
			qcom,msm-bus,num-cases = <0x8>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x416 0xc80 0x51 0x200 0xcc3e 0x27100 0x51 0x200 0xff50 0x30d40 0x51 0x200 0x1fe9e 0x61a80 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x146cc2 0x3e8000>;
			qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>;
			qcom,devfreq,freq-table = <0x2faf080 0xbebc200>;
			clocks = <0xa 0x23d5727f 0xa 0x861b20ac>;
			clock-names = "iface_clk", "core_clk";
			status = "disabled";
			phandle = <0x22d>;
		};

		qseecom@85b00000 {
			compatible = "qcom,qseecom";
			reg = <0x85b00000 0x800000>;
			reg-names = "secapp-region";
			qcom,hlos-num-ce-hw-instances = <0x1>;
			qcom,hlos-ce-hw-instance = <0x0>;
			qcom,qsee-ce-hw-instance = <0x0>;
			qcom,disk-encrypt-pipe-pair = <0x2>;
			qcom,support-fde;
			qcom,msm-bus,name = "qseecom-noc";
			qcom,msm-bus,num-cases = <0x4>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,support-bus-scaling;
			qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x0 0x0 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>;
			clocks = <0xa 0x37a21414 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b>;
			clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk";
			qcom,ce-opp-freq = <0x5f5e100>;
			phandle = <0x22e>;
		};

		qcom,iris-fm {
			compatible = "qcom,iris_fm";
		};

		qcom,mss@4080000 {
			compatible = "qcom,pil-q6v55-mss";
			reg = <0x4080000 0x100 0x194f000 0x10 0x1950000 0x8 0x1951000 0x8 0x4020000 0x40 0x1871000 0x4>;
			reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", "rmb_base", "restart_reg";
			interrupts = <0x0 0x18 0x1>;
			vdd_mss-supply = <0xb3>;
			vdd_cx-supply = <0xb3>;
			vdd_cx-voltage = <0x180>;
			vdd_mx-supply = <0xcf>;
			vdd_mx-uV = <0x180>;
			vdd_pll-supply = <0xc4>;
			qcom,vdd_pll = <0x1b7740>;
			vdd_mss-uV = <0x180>;
			clocks = <0xa 0xe97a8354 0xa 0x111cde81 0xa 0x67544d62 0xa 0xde2adeb1>;
			clock-names = "xo", "iface_clk", "bus_clk", "mem_clk";
			qcom,proxy-clock-names = "xo";
			qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk";
			qcom,firmware-name = "modem";
			qcom,pil-self-auth;
			qcom,override-acc-1 = <0x80800000>;
			qcom,sysmon-id = <0x0>;
			qcom,ssctl-instance-id = <0x12>;
			qcom,qdsp6v56-1-8-inrush-current;
			qcom,reset-clk;
			qcom,gpio-err-fatal = <0xd0 0x0 0x0>;
			qcom,gpio-err-ready = <0xd0 0x1 0x0>;
			qcom,gpio-proxy-unvote = <0xd0 0x2 0x0>;
			qcom,gpio-stop-ack = <0xd0 0x3 0x0>;
			qcom,gpio-shutdown-ack = <0xd0 0x7 0x0>;
			qcom,gpio-force-stop = <0xd1 0x0 0x0>;
			memory-region = <0xd2>;
		};

		qcom,lpass@c200000 {
			compatible = "qcom,pil-tz-generic";
			reg = <0xc200000 0x100>;
			interrupts = <0x0 0x125 0x1>;
			vdd_cx-supply = <0xb3>;
			qcom,proxy-reg-names = "vdd_cx";
			qcom,vdd_cx-uV-uA = <0x180 0x186a0>;
			clocks = <0xa 0xb72aa4c9 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b 0xa 0x37a21414>;
			clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,scm_core_clk_src-freq = <0x4c4b400>;
			qcom,mas-crypto = <0xd3>;
			qcom,pas-id = <0x1>;
			qcom,complete-ramdump;
			qcom,proxy-timeout-ms = <0x2710>;
			qcom,smem-id = <0x1a7>;
			qcom,sysmon-id = <0x1>;
			qcom,ssctl-instance-id = <0x14>;
			qcom,firmware-name = "adsp";
			qcom,gpio-err-fatal = <0xd4 0x0 0x0>;
			qcom,gpio-proxy-unvote = <0xd4 0x2 0x0>;
			qcom,gpio-err-ready = <0xd4 0x1 0x0>;
			qcom,gpio-stop-ack = <0xd4 0x3 0x0>;
			qcom,gpio-force-stop = <0xd5 0x0 0x0>;
			memory-region = <0xd6>;
		};

		qcom,pronto@a21b000 {
			compatible = "qcom,pil-tz-generic";
			reg = <0xa21b000 0x3000>;
			interrupts = <0x0 0x95 0x1>;
			vdd_pronto_pll-supply = <0xc4>;
			proxy-reg-names = "vdd_pronto_pll";
			vdd_pronto_pll-uV-uA = <0x1b7740 0x4650>;
			clocks = <0xa 0x89dae6d0 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b 0xa 0x37a21414>;
			clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,scm_core_clk_src = <0x4c4b400>;
			qcom,mas-crypto = <0xd3>;
			qcom,pas-id = <0x6>;
			qcom,proxy-timeout-ms = <0x2710>;
			qcom,smem-id = <0x1a6>;
			qcom,sysmon-id = <0x6>;
			qcom,ssctl-instance-id = <0x13>;
			qcom,firmware-name = "wcnss";
			qcom,gpio-err-fatal = <0xd7 0x0 0x0>;
			qcom,gpio-err-ready = <0xd7 0x1 0x0>;
			qcom,gpio-proxy-unvote = <0xd7 0x2 0x0>;
			qcom,gpio-stop-ack = <0xd7 0x3 0x0>;
			qcom,gpio-force-stop = <0xd8 0x0 0x0>;
			memory-region = <0xd9>;
		};

		qcom,venus@1de0000 {
			compatible = "qcom,pil-tz-generic";
			reg = <0x1de0000 0x4000>;
			vdd-supply = <0x9b>;
			qcom,proxy-reg-names = "vdd";
			clocks = <0xa 0xf76a02bb 0xa 0x8d778c6 0xa 0xcdf4c8f6 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b 0xa 0x37a21414>;
			clock-names = "core_clk", "iface_clk", "bus_clk", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src";
			qcom,scm_core_clk_src-freq = <0x4c4b400>;
			qcom,msm-bus,name = "pil-venus";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x0 0x0 0x3f 0x200 0x0 0x4a380>;
			qcom,mas-crypto = <0xd3>;
			qcom,pas-id = <0x9>;
			qcom,proxy-timeout-ms = <0x64>;
			qcom,firmware-name = "venus";
			memory-region = <0xda>;
		};

		qrng@e3000 {
			compatible = "qcom,msm-rng";
			reg = <0xe3000 0x1000>;
			qcom,msm-rng-iface-clk;
			qcom,no-qrng-config;
			qcom,msm-bus,name = "msm-rng-noc";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x1 0x26a 0x0 0x0 0x1 0x26a 0x0 0x320>;
			clocks = <0xa 0x397e7eaa>;
			clock-names = "iface_clk";
			phandle = <0x22f>;
		};

		qcrypto@720000 {
			compatible = "qcom,qcrypto";
			reg = <0x720000 0x20000 0x704000 0x20000>;
			reg-names = "crypto-base", "crypto-bam-base";
			interrupts = <0x0 0xcf 0x0>;
			qcom,bam-pipe-pair = <0x2>;
			qcom,ce-hw-instance = <0x0>;
			qcom,ce-device = <0x0>;
			qcom,ce-hw-shared;
			qcom,clk-mgmt-sus-res;
			qcom,msm-bus,name = "qcrypto-noc";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x60180 0x60180>;
			clocks = <0xa 0x37a21414 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b>;
			clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk";
			qcom,use-sw-aes-cbc-ecb-ctr-algo;
			qcom,use-sw-aes-xts-algo;
			qcom,use-sw-aes-ccm-algo;
			qcom,use-sw-ahash-algo;
			qcom,use-sw-hmac-algo;
			qcom,use-sw-aead-algo;
			qcom,ce-opp-freq = <0x5f5e100>;
			phandle = <0x230>;
		};

		qcedev@720000 {
			compatible = "qcom,qcedev";
			reg = <0x720000 0x20000 0x704000 0x20000>;
			reg-names = "crypto-base", "crypto-bam-base";
			interrupts = <0x0 0xcf 0x0>;
			qcom,bam-pipe-pair = <0x1>;
			qcom,ce-hw-instance = <0x0>;
			qcom,ce-device = <0x0>;
			qcom,ce-hw-shared;
			qcom,msm-bus,name = "qcedev-noc";
			qcom,msm-bus,num-cases = <0x2>;
			qcom,msm-bus,num-paths = <0x1>;
			qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x60180 0x60180>;
			clocks = <0xa 0x37a21414 0xa 0xd390d2 0xa 0x94de4919 0xa 0xd4415c9b>;
			clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk";
			qcom,ce-opp-freq = <0x5f5e100>;
			phandle = <0x231>;
		};

		qcom,adsprpc-mem {
			compatible = "qcom,msm-adsprpc-mem-region";
			memory-region = <0xdb>;
		};

		qcom,msm_fastrpc {
			compatible = "qcom,msm-fastrpc-legacy-compute";

			qcom,msm_fastrpc_compute_cb {
				compatible = "qcom,msm-fastrpc-legacy-compute-cb";
				label = "adsprpc-smd";
				iommus = <0xe 0x2008 0x7>;
				sids = <0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>;
			};
		};

		spi@7af6000 {
			compatible = "qcom,spi-qup-v2";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg-names = "spi_physical", "spi_bam_physical";
			reg = <0x7af6000 0x600 0x7ac4000 0x1d000>;
			interrupt-names = "spi_irq", "spi_bam_irq";
			interrupts = <0x0 0x12c 0x0 0x0 0xef 0x0>;
			spi-max-frequency = <0x2faf080>;
			pinctrl-names = "spi_default", "spi_sleep";
			pinctrl-0 = <0xdc 0xdd>;
			pinctrl-1 = <0xde 0xdf>;
			clocks = <0xa 0x8f283c1d 0xa 0xbf54ca6d>;
			clock-names = "iface_clk", "core_clk";
			qcom,infinite-mode = <0x0>;
			qcom,use-bam;
			qcom,use-pinctrl;
			qcom,ver-reg-exists;
			qcom,bam-consumer-pipe-index = <0x6>;
			qcom,bam-producer-pipe-index = <0x7>;
			qcom,master-id = <0x54>;
			status = "disabled";
			phandle = <0x232>;
		};

		qcom,wcnss-wlan@a000000 {
			compatible = "qcom,wcnss_wlan";
			reg = <0xa000000 0x280000 0xb011008 0x4 0xa21b000 0x3000 0x3204000 0x100 0x3200800 0x200 0xa100400 0x200 0xa205050 0x200 0xa219000 0x20 0xa080488 0x8 0xa080fb0 0x8 0xa08040c 0x8 0xa0120a8 0x8 0xa012448 0x8 0xa080c00 0x1>;
			reg-names = "wcnss_mmio", "wcnss_fiq", "pronto_phy_base", "riva_phy_base", "riva_ccu_base", "pronto_a2xb_base", "pronto_ccpu_base", "pronto_saw2_base", "wlan_tx_phy_aborts", "wlan_brdg_err_source", "wlan_tx_status", "alarms_txctl", "alarms_tactl", "pronto_mcu_base";
			interrupts = <0x0 0x91 0x0 0x0 0x92 0x0>;
			interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
			qcom,pronto-vddmx-supply = <0xcf>;
			qcom,pronto-vddcx-supply = <0xb3>;
			qcom,pronto-vddpx-supply = <0xc4>;
			qcom,iris-vddxo-supply = <0xc4>;
			qcom,iris-vddrfa-supply = <0xe0>;
			qcom,iris-vddpa-supply = <0xe1>;
			qcom,iris-vdddig-supply = <0xc4>;
			qcom,iris-vddxo-voltage-level = <0x1b7740 0x0 0x1b7740>;
			qcom,iris-vddrfa-voltage-level = <0x1437c8 0x0 0x1437c8>;
			qcom,iris-vddpa-voltage-level = <0x325aa0 0x0 0x325aa0>;
			qcom,iris-vdddig-voltage-level = <0x1b7740 0x0 0x1b7740>;
			qcom,vddmx-voltage-level = <0x100 0x0 0x180>;
			qcom,vddcx-voltage-level = <0x100 0x0 0x180>;
			qcom,vddpx-voltage-level = <0x1b7740 0x0 0x1b7740>;
			qcom,iris-vddxo-current = <0x2710>;
			qcom,iris-vddrfa-current = <0x186a0>;
			qcom,iris-vddpa-current = <0x7dbb8>;
			qcom,iris-vdddig-current = <0x2710>;
			qcom,pronto-vddmx-current = <0x0>;
			qcom,pronto-vddcx-current = <0x0>;
			qcom,pronto-vddpx-current = <0x0>;
			pinctrl-names = "wcnss_default", "wcnss_sleep", "wcnss_gpio_default";
			pinctrl-0 = <0xe2>;
			pinctrl-1 = <0xe3>;
			pinctrl-2 = <0xe4>;
			gpios = <0x15 0x4c 0x0 0x15 0x4d 0x0 0x15 0x4e 0x0 0x15 0x4f 0x0 0x15 0x50 0x0>;
			clocks = <0xa 0x116b76f 0xa 0x24a30992 0xe5 0x917968c2 0xa 0x709f430b>;
			clock-names = "xo", "rf_clk", "measure", "wcnss_debug";
			qcom,has-autodetect-xo;
			qcom,is-pronto-v3;
			qcom,has-pronto-hw;
			qcom,wcnss-adc_tm = <0xca>;
		};

		qcom,msm-ssc-sensors {
			compatible = "qcom,msm-ssc-sensors";
			phandle = <0x233>;
		};

		regulator@01946004 {
			compatible = "qcom,mem-acc-regulator";
			regulator-name = "mem_acc_corner";
			regulator-min-microvolt = <0x1>;
			regulator-max-microvolt = <0x3>;
			qcom,acc-reg-addr-list = <0x1942138 0x1942130 0x1942120 0x1942124>;
			qcom,acc-init-reg-config = <0x1 0xff 0x2 0x5555>;
			qcom,num-acc-corners = <0x3>;
			qcom,boot-acc-corner = <0x2>;
			qcom,corner1-reg-config = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x0 0x4 0x0>;
			qcom,corner2-reg-config = <0x3 0x30c30c3 0x4 0x30c3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x0 0x4 0x0>;
			qcom,corner3-reg-config = <0x3 0x1041041 0x4 0x1041 0x3 0x30c30c3 0x4 0x30c3 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
			reg = <0xa4000 0x1000>;
			reg-names = "efuse_addr";
			qcom,override-acc-fuse-sel = <0x47 0x11 0x3 0x0>;
			qcom,override-fuse-version-map = <0x1 0x2 0x3 0x4>;
			qcom,override-corner1-addr-val-map = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x1 0x4 0x0 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x3 0x4 0x0 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041043 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x0 0x4 0x0 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041043 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x1 0x4 0x0>;
			qcom,override-corner2-addr-val-map = <0x3 0x30c30c3 0x4 0x30c3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1 0x4 0x0 0x3 0x30c30c3 0x4 0x30c3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x3 0x4 0x0 0x3 0x30c30c3 0x4 0x30c3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x0 0x4 0x0 0x3 0x30c30c3 0x4 0x30c3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1 0x4 0x0>;
			qcom,override-corner3-addr-val-map = <0x3 0x1041041 0x4 0x1041 0x3 0x30c30c3 0x4 0x30c3 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x30c30c3 0x4 0x30c3 0x3 0x1041041 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x30c30c3 0x4 0x30c3 0x3 0x1041043 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x3 0x30c30c3 0x4 0x30c3 0x3 0x1041043 0x4 0x1041 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
			phandle = <0xe7>;
		};

		regulator@b018000 {
			compatible = "qcom,cpr-regulator";
			reg = <0xb018000 0x1000 0xb011064 0x4 0xa4000 0x1000>;
			reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
			interrupts = <0x0 0xf 0x0>;
			regulator-name = "apc_corner";
			regulator-min-microvolt = <0x1>;
			regulator-max-microvolt = <0x5>;
			qcom,cpr-fuse-corners = <0x3>;
			qcom,cpr-voltage-ceiling = <0x119fb8 0x12b128 0x149970>;
			qcom,cpr-voltage-floor = <0x100590 0x100590 0x10a1d0>;
			vdd-apc-supply = <0xe6>;
			mem-acc-supply = <0xe7>;
			qcom,cpr-ref-clk = <0x4b00>;
			qcom,cpr-timer-delay = <0x1388>;
			qcom,cpr-timer-cons-up = <0x0>;
			qcom,cpr-timer-cons-down = <0x2>;
			qcom,cpr-irq-line = <0x0>;
			qcom,cpr-step-quotient = <0x1a>;
			qcom,cpr-up-threshold = <0x0>;
			qcom,cpr-down-threshold = <0x2>;
			qcom,cpr-idle-clocks = <0xf>;
			qcom,cpr-gcnt-time = <0x1>;
			qcom,vdd-apc-step-up-limit = <0x1>;
			qcom,vdd-apc-step-down-limit = <0x1>;
			qcom,cpr-apc-volt-step = <0x30d4>;
			qcom,cpr-fuse-row = <0x43 0x0>;
			qcom,cpr-fuse-target-quot = <0x2a 0x18 0x6>;
			qcom,cpr-fuse-ro-sel = <0x3c 0x39 0x36>;
			qcom,cpr-init-voltage-ref = <0x119fb8 0x12b128 0x149970>;
			qcom,cpr-fuse-init-voltage = <0x43 0x24 0x6 0x0 0x43 0x12 0x6 0x0 0x43 0x0 0x6 0x0>;
			qcom,cpr-fuse-quot-offset = <0x47 0x1a 0x6 0x0 0x47 0x14 0x6 0x0 0x46 0x36 0x7 0x0>;
			qcom,cpr-fuse-quot-offset-scale = <0x5 0x5 0x5>;
			qcom,cpr-init-voltage-step = <0x2710>;
			qcom,cpr-corner-map = <0x1 0x2 0x3 0x3 0x3>;
			qcom,cpr-corner-frequency-map = <0x1 0x39387000 0x2 0x413b3800 0x3 0x4a62f800 0x4 0x4dd1e000 0x5 0x53819040>;
			qcom,speed-bin-fuse-sel = <0x25 0x22 0x3 0x0>;
			qcom,cpr-speed-bin-max-corners = <0x0 0xffffffff 0x1 0x2 0x5 0x3 0xffffffff 0x1 0x2 0x5>;
			qcom,cpr-fuse-revision = <0x45 0x27 0x3 0x0>;
			qcom,cpr-quot-adjust-scaling-factor-max = <0x0 0x578 0x578>;
			qcom,cpr-voltage-scaling-factor-max = <0x0 0x7d0 0x7d0>;
			qcom,cpr-scaled-init-voltage-as-ceiling;
			qcom,cpr-quotient-adjustment = <0x32 0x28 0x32>;
			qcom,cpr-init-voltage-adjustment = <0x7530 0x1388 0x2710>;
			qcom,cpr-enable;
			phandle = <0xb7>;
		};

		qcom,gdsc@184c018 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_venus";
			reg = <0x184c018 0x4>;
			status = "okay";
			clock-names = "bus_clk", "core_clk";
			clocks = <0xa 0xcdf4c8f6 0xa 0xf76a02bb>;
			phandle = <0x9b>;
		};

		qcom,gdsc@184d078 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_mdss";
			reg = <0x184d078 0x4>;
			status = "okay";
			clock-names = "core_clk", "bus_clk";
			clocks = <0xa 0x22f3521f 0xa 0x668f51de>;
			phandle = <0x91>;
		};

		qcom,gdsc@185701c {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_jpeg";
			reg = <0x185701c 0x4>;
			status = "okay";
			clock-names = "core_clk", "bus_clk";
			clocks = <0xa 0x1ed3f032 0xa 0x3e278896>;
			phandle = <0xf>;
		};

		qcom,gdsc@1858034 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_vfe";
			reg = <0x1858034 0x4>;
			status = "okay";
			clock-names = "core_clk", "bus_clk", "micro_clk", "csi_clk";
			clocks = <0xa 0xaaa3cd97 0xa 0x77fe2384 0xa 0xfbbee8cf 0xa 0xcc73453c>;
			phandle = <0xc>;
		};

		qcom,gdsc@185806c {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_vfe1";
			reg = <0x185806c 0x4>;
			status = "okay";
			clock-names = "core_clk", "bus_clk", "micro_clk", "csi_clk";
			clocks = <0xa 0xcaf20d99 0xa 0xaf7463b3 0xa 0xfbbee8cf 0xa 0xb1ef6e8b>;
			phandle = <0xd>;
		};

		qcom,gdsc@1858078 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_cpp";
			reg = <0x1858078 0x4>;
			status = "okay";
			clock-names = "core_clk", "bus_clk";
			clocks = <0xa 0x7118a0de 0xa 0xbbf73861>;
			phandle = <0x10>;
		};

		qcom,gdsc@185901c {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_oxili_gx";
			reg = <0x185901c 0x4>;
			status = "okay";
			clock-names = "core_root_clk", "gfx_clk";
			clocks = <0xa 0x917f76ef 0xa 0x49a51fd9>;
			qcom,enable-root-clk;
			qcom,clk-dis-wait-val = <0x5>;
			phandle = <0x99>;
		};

		qcom,gdsc@184c028 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_venus_core0";
			reg = <0x184c028 0x4>;
			status = "okay";
			qcom,support-hw-trigger;
			clock-names = "core0_clk";
			clocks = <0xa 0x83a7f549>;
			phandle = <0x9c>;
		};
		qcom,gdsc@184c030 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_venus_core1";
			reg = <0x184c030 0x4>;
			status = "disabled";
			phandle = <0x234>;
		};

		qcom,gdsc@185904c {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_oxili_cx";
			reg = <0x185904c 0x4>;
			status = "disabled";
			phandle = <0x235>;
		};

		qcom,gdsc@183f078 {
			compatible = "qcom,gdsc";
			regulator-name = "gdsc_usb30";
			reg = <0x183f078 0x4>;
			status = "disabled";
			phandle = <0x236>;
		};

		qmi-tmd-devices {
			compatible = "qcom,qmi_cooling_devices";

			modem {
				qcom,instance-id = <0x0>;

				modem_pa {
					qcom,qmi-dev-name = "pa";
					#cooling-cells = <0x2>;
					phandle = <0x237>;
				};

				modem_proc {
					qcom,qmi-dev-name = "modem";
					#cooling-cells = <0x2>;
					phandle = <0x238>;
				};

				modem_current {
					qcom,qmi-dev-name = "modem_current";
					#cooling-cells = <0x2>;
					phandle = <0x239>;
				};

				modem_vdd {
					qcom,qmi-dev-name = "cpuv_restriction_cold";
					#cooling-cells = <0x2>;
					phandle = <0xa9>;
				};
			};
		};

		gpio-regulator@0 {
			compatible = "regulator-fixed";
			reg = <0x0 0x0>;
			regulator-name = "disp_vdda_eldo1";
			regulator-min-microvolt = <0x124f80>;
			regulator-max-microvolt = <0x124f80>;
			regulator-enable-ramp-delay = <0x87>;
			enable-active-high;
			gpio = <0xe8 0x3 0x0>;
			pinctrl-names = "default";
			pinctrl-0 = <0xe9>;
			vin-supply = <0xea>;
			phandle = <0x23a>;
		};

		usb_vdig_supply {
			compatible = "regulator-fixed";
			regulator-name = "usb_vdig_supply";
			regulator-min-microvolt = <0x124f80>;
			regulator-max-microvolt = <0x124f80>;
			phandle = <0xc3>;
		};

		qcom,msm-pcm {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = <0x0>;
			phandle = <0xed>;
		};

		qcom,msm-pcm-routing {
			compatible = "qcom,msm-pcm-routing";
			phandle = <0xf7>;
		};

		qcom,msm-compr-dsp {
			compatible = "qcom,msm-compr-dsp";
			phandle = <0x23b>;
		};

		qcom,msm-pcm-low-latency {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = <0x1>;
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "regular";
			phandle = <0xee>;
		};

		qcom,msm-ultra-low-latency {
			compatible = "qcom,msm-pcm-dsp";
			qcom,msm-pcm-dsp-id = <0x2>;
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "ultra";
			phandle = <0xef>;
		};

		qcom,msm-pcm-dsp-noirq {
			compatible = "qcom,msm-pcm-dsp-noirq";
			qcom,msm-pcm-low-latency;
			qcom,latency-level = "ultra";
			phandle = <0xf8>;
		};

		qcom,msm-compress-dsp {
			compatible = "qcom,msm-compress-dsp";
			phandle = <0xf3>;
		};

		qcom,msm-voip-dsp {
			compatible = "qcom,msm-voip-dsp";
			phandle = <0xf0>;
		};

		qcom,msm-pcm-voice {
			compatible = "qcom,msm-pcm-voice";
			qcom,destroy-cvd;
			qcom,vote-bms;
			phandle = <0xf1>;
		};

		qcom,msm-stub-codec {
			compatible = "qcom,msm-stub-codec";
			phandle = <0x114>;
		};
		qcom,msm-dai-fe {
			compatible = "qcom,msm-dai-fe";
		};

		qcom,msm-pcm-afe {
			compatible = "qcom,msm-pcm-afe";
			phandle = <0xf5>;
		};

		qcom,msm-dai-q6-hdmi {
			compatible = "qcom,msm-dai-q6-hdmi";
			qcom,msm-dai-q6-dev-id = <0x8>;
			phandle = <0x23c>;
		};

		qcom,msm-dai-q6-dp {
			compatible = "qcom,msm-dai-q6-hdmi";
			qcom,msm-dai-q6-dev-id = <0x6020>;
			phandle = <0x23d>;
		};

		qcom,msm-pcm-loopback {
			compatible = "qcom,msm-pcm-loopback";
			phandle = <0xf2>;
		};

		qcom,msm-dai-mi2s {
			compatible = "qcom,msm-dai-mi2s";
			phandle = <0x23e>;

			qcom,msm-dai-q6-mi2s-prim {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x0>;
				qcom,msm-mi2s-rx-lines = <0x3>;
				qcom,msm-mi2s-tx-lines = <0x0>;
				phandle = <0xfa>;
			};

			qcom,msm-dai-q6-mi2s-sec {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x1>;
				qcom,msm-mi2s-rx-lines = <0x1>;
				qcom,msm-mi2s-tx-lines = <0x0>;
				phandle = <0xfb>;
			};

			qcom,msm-dai-q6-mi2s-tert {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x2>;
				qcom,msm-mi2s-rx-lines = <0x0>;
				qcom,msm-mi2s-tx-lines = <0x3>;
				phandle = <0xfc>;
			};

			qcom,msm-dai-q6-mi2s-quat {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x3>;
				qcom,msm-mi2s-rx-lines = <0x1>;
				qcom,msm-mi2s-tx-lines = <0x2>;
				phandle = <0xfd>;
			};

			qcom,msm-dai-q6-mi2s-quin {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x4>;
				qcom,msm-mi2s-rx-lines = <0x1>;
				qcom,msm-mi2s-tx-lines = <0x2>;
				phandle = <0xfe>;
			};
			qcom,msm-dai-q6-mi2s-senary {
				compatible = "qcom,msm-dai-q6-mi2s";
				qcom,msm-dai-q6-mi2s-dev-id = <0x6>;
				qcom,msm-mi2s-rx-lines = <0x0>;
				qcom,msm-mi2s-tx-lines = <0x3>;
				phandle = <0xff>;
			};
		};

		qcom,msm-lsm-client {
			compatible = "qcom,msm-lsm-client";
			phandle = <0xf6>;
		};

		qcom,msm-dai-q6 {
			compatible = "qcom,msm-dai-q6";

			qcom,msm-dai-q6-sb-0-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4000>;
				phandle = <0x100>;
			};

			qcom,msm-dai-q6-sb-0-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4001>;
				phandle = <0x101>;
			};

			qcom,msm-dai-q6-sb-1-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4002>;
				phandle = <0x102>;
			};

			qcom,msm-dai-q6-sb-1-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4003>;
				phandle = <0x103>;
			};

			qcom,msm-dai-q6-sb-2-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4004>;
				phandle = <0x23f>;
			};

			qcom,msm-dai-q6-sb-2-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4005>;
				phandle = <0x240>;
			};

			qcom,msm-dai-q6-sb-3-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4006>;
				phandle = <0x104>;
			};

			qcom,msm-dai-q6-sb-3-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4007>;
				phandle = <0x105>;
			};

			qcom,msm-dai-q6-sb-4-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4008>;
				phandle = <0x106>;
			};

			qcom,msm-dai-q6-sb-4-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4009>;
				phandle = <0x107>;
			};

			qcom,msm-dai-q6-sb-5-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x400b>;
				phandle = <0x241>;
			};

			qcom,msm-dai-q6-sb-5-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x400a>;
				phandle = <0x242>;
			};

			qcom,msm-dai-q6-sb-6-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x400c>;
				phandle = <0x243>;
			};

			qcom,msm-dai-q6-sb-7-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x400e>;
				phandle = <0x244>;
			};

			qcom,msm-dai-q6-sb-7-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x400f>;
				phandle = <0x245>;
			};

			qcom,msm-dai-q6-sb-8-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4010>;
				phandle = <0x246>;
			};

			qcom,msm-dai-q6-sb-8-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x4011>;
				phandle = <0x247>;
			};

			qcom,msm-dai-q6-bt-sco-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x3000>;
				phandle = <0x108>;
			};

			qcom,msm-dai-q6-bt-sco-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x3001>;
				phandle = <0x109>;
			};

			qcom,msm-dai-q6-int-fm-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x3004>;
				phandle = <0x10a>;
			};

			qcom,msm-dai-q6-int-fm-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x3005>;
				phandle = <0x10b>;
			};

			qcom,msm-dai-q6-be-afe-pcm-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0xe0>;
				phandle = <0x10c>;
			};

			qcom,msm-dai-q6-be-afe-pcm-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0xe1>;
				phandle = <0x10d>;
			};

			qcom,msm-dai-q6-afe-proxy-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0xf1>;
				phandle = <0x10e>;
			};

			qcom,msm-dai-q6-afe-proxy-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0xf0>;
				phandle = <0x10f>;
			};

			qcom,msm-dai-q6-afe-loopback-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x6001>;
				phandle = <0x248>;
			};

			qcom,msm-dai-q6-incall-record-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x8003>;
				phandle = <0x110>;
			};

			qcom,msm-dai-q6-incall-record-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x8004>;
				phandle = <0x111>;
			};

			qcom,msm-dai-q6-incall-music-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x8005>;
				phandle = <0x112>;
			};

			qcom,msm-dai-q6-incall-music-2-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x8002>;
				phandle = <0x113>;
			};

			qcom,msm-dai-q6-usb-audio-rx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x7000>;
				phandle = <0x249>;
			};

			qcom,msm-dai-q6-usb-audio-tx {
				compatible = "qcom,msm-dai-q6-dev";
				qcom,msm-dai-q6-dev-id = <0x7001>;
				phandle = <0x24a>;
			};
		};
		qcom,msm-pcm-hostless {
			compatible = "qcom,msm-pcm-hostless";
			phandle = <0xf4>;
		};

		qcom,msm-audio-apr {
			compatible = "qcom,msm-audio-apr";
			qcom,subsys-name = "apr_adsp";
			phandle = <0x24b>;

			msm_audio_apr_dummy {
				compatible = "qcom,msm-audio-apr-dummy";
			};
		};

		qcom,msm-pri-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>;
			qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>;
			qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-data = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>;
			qcom,msm-auxpcm-interface = "primary";
			qcom,msm-cpudai-afe-clk-ver = <0x2>;
			phandle = <0xf9>;
		};

		qcom,msm-sec-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>;
			qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>;
			qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-data = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>;
			qcom,msm-auxpcm-interface = "secondary";
			qcom,msm-cpudai-afe-clk-ver = <0x2>;
			phandle = <0x24c>;
		};

		qcom,msm-tert-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>;
			qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>;
			qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-data = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>;
			qcom,msm-auxpcm-interface = "tertiary";
			qcom,msm-cpudai-afe-clk-ver = <0x2>;
			phandle = <0x24d>;
		};

		qcom,msm-quat-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>;
			qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>;
			qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-data = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>;
			qcom,msm-auxpcm-interface = "quaternary";
			qcom,msm-cpudai-afe-clk-ver = <0x2>;
			phandle = <0x24e>;
		};

		qcom,msm-quin-auxpcm {
			compatible = "qcom,msm-auxpcm-dev";
			qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>;
			qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>;
			qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>;
			qcom,msm-cpudai-auxpcm-data = <0x0 0x0>;
			qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>;
			qcom,msm-auxpcm-interface = "quinary";
			qcom,msm-cpudai-afe-clk-ver = <0x2>;
			phandle = <0x24f>;
		};

		qcom,msm-hdmi-dba-codec-rx {
			compatible = "qcom,msm-hdmi-dba-codec-rx";
			qcom,dba-bridge-chip = "adv7533";
			phandle = <0x250>;
		};

		qcom,msm-audio-ion {
			compatible = "qcom,msm-audio-ion";
			qcom,smmu-version = <0x2>;
			qcom,smmu-enabled;
			iommus = <0xe 0x2001 0x0>;
			qcom,smmu-sid-mask = <0x0 0xf>;
			phandle = <0x251>;
		};

		qcom,msm-adsp-loader {
			status = "ok";
			compatible = "qcom,adsp-loader";
			qcom,adsp-state = <0x0>;
		};

		qcom,msm-dai-tdm-pri-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9100>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9000>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-pri-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9000>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x252>;
			};
		};

		qcom,msm-dai-tdm-pri-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9101>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9001>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-pri-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9001>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x253>;
			};
		};

		qcom,msm-dai-tdm-sec-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9110>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9010>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-sec-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9010>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x254>;
			};
		};

		qcom,msm-dai-tdm-sec-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9111>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9011>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-sec-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9011>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x255>;
			};
		};

		qcom,msm-dai-tdm-tert-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9120>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9020>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-tert-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9020>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x256>;
			};
		};

		qcom,msm-dai-tdm-tert-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9121>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9021>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-tert-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9021>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x257>;
			};
		};

		qcom,msm-dai-tdm-quat-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9130>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9030>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-quat-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9030>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x258>;
			};
		};

		qcom,msm-dai-tdm-quat-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9131>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9031>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-quat-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9031>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x259>;
			};
		};

		qcom,msm-dai-tdm-quin-rx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9140>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9040>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-quin-rx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9040>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x25a>;
			};
		};

		qcom,msm-dai-tdm-quin-tx {
			compatible = "qcom,msm-dai-tdm";
			qcom,msm-cpudai-tdm-group-id = <0x9141>;
			qcom,msm-cpudai-tdm-group-num-ports = <0x1>;
			qcom,msm-cpudai-tdm-group-port-id = <0x9041>;
			qcom,msm-cpudai-tdm-clk-rate = <0x177000>;
			qcom,msm-cpudai-tdm-clk-internal = <0x1>;
			qcom,msm-cpudai-tdm-sync-mode = <0x1>;
			qcom,msm-cpudai-tdm-sync-src = <0x1>;
			qcom,msm-cpudai-tdm-data-out = <0x0>;
			qcom,msm-cpudai-tdm-invert-sync = <0x1>;
			qcom,msm-cpudai-tdm-data-delay = <0x1>;

			qcom,msm-dai-q6-tdm-quin-tx-0 {
				compatible = "qcom,msm-dai-q6-tdm";
				qcom,msm-cpudai-tdm-dev-id = <0x9041>;
				qcom,msm-cpudai-tdm-data-align = <0x0>;
				phandle = <0x25b>;
			};
		};

		qcom,avtimer@c0a300c {
			compatible = "qcom,avtimer";
			reg = <0xc0a300c 0x4 0xc0a3010 0x4>;
			reg-names = "avtimer_lsb_addr", "avtimer_msb_addr";
			qcom,clk-div = <0x1b>;
		};

		sound {
			status = "okay";
			compatible = "qcom,msm8952-audio-codec";
			qcom,model = "msm8952-snd-card-mtp";
			reg = <0xc051000 0x4 0xc051004 0x4 0xc055000 0x4 0xc052000 0x4>;
			reg-names = "csr_gp_io_mux_mic_ctl", "csr_gp_io_mux_spkr_ctl", "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", "csr_gp_io_mux_quin_ctl";
			qcom,msm-ext-pa = "primary";
			qcom,msm-mclk-freq = <0x927c00>;
			qcom,msm-mbhc-hphl-swh = <0x1>;
			qcom,msm-mbhc-gnd-swh = <0x1>;
			qcom,msm-hs-micbias-type = "external";
			qcom,msm-micbias1-ext-cap;
			qcom,audio-routing = "RX_BIAS", "MCLK", "SPK_RX_BIAS", "MCLK", "INT_LDO_H", "MCLK", "RX_I2S_CLK", "MCLK", "TX_I2S_CLK", "MCLK", "MIC BIAS External", "Handset Mic", "MIC BIAS External2", "Headset Mic", "MIC BIAS External", "Secondary Mic", "AMIC1", "MIC BIAS External", "AMIC2", "MIC BIAS External2", "AMIC3", "MIC BIAS External", "ADC1_IN", "ADC1_OUT", "ADC2_IN", "ADC2_OUT", "ADC3_IN", "ADC3_OUT", "PDM_IN_RX1", "PDM_OUT_RX1", "PDM_IN_RX2", "PDM_OUT_RX2", "PDM_IN_RX3", "PDM_OUT_RX3";
			qcom,pri-mi2s-gpios = <0xeb>;
			qcom,quin-mi2s-gpios = <0xec>;
			asoc-platform = <0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8>;
			asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", "msm-pcm-dsp.2", "msm-voip-dsp", "msm-pcm-voice", "msm-pcm-loopback", "msm-compress-dsp", "msm-pcm-hostless", "msm-pcm-afe", "msm-lsm-client", "msm-pcm-routing", "msm-pcm-dsp-noirq";
			asoc-cpu = <0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff 0x100 0x101 0x102 0x103 0x104 0x105 0x106 0x107 0x108 0x109 0x10a 0x10b 0x10c 0x10d 0x10e 0x10f 0x110 0x111 0x112 0x113>;
			asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4", "msm-dai-q6-mi2s.6", "msm-dai-q6-dev.16384", "msmdai-q6-dev.16385", "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770";
			asoc-codec = <0x114 0x115 0x116>;
			asoc-codec-names = "msm-stub-codec.1", "msm-dig-codec", "analog-codec";
			phandle = <0x25c>;
		};

		msm_cdc_pinctrl_us_euro_sw {
			compatible = "qcom,msm-cdc-pinctrl";
			pinctrl-names = "aud_active", "aud_sleep";
			pinctrl-0 = <0x117>;
			pinctrl-1 = <0x118>;
			phandle = <0x25d>;
		};

		msm_cdc_pinctrl_pri {
			compatible = "qcom,msm-cdc-pinctrl";
			pinctrl-names = "aud_active", "aud_sleep";
			pinctrl-0 = <0x119 0x11a>;
			pinctrl-1 = <0x11b 0x11c>;
			phandle = <0xeb>;
		};

		msm_cdc_pinctrl_quin {
			compatible = "qcom,msm-cdc-pinctrl";
			pinctrl-names = "aud_active", "aud_sleep";
			pinctrl-0 = <0x11d 0x11e>;
			pinctrl-1 = <0x11f 0x120>;
			phandle = <0xec>;
		};
	};

	chosen {
		bootargs = "sched_enable_hmp=1";
	};

	aliases {
		smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm";
		smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl";
		smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd";
		smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge";
		smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd";
		smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data";
		smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1";
		smd8 = "/soc/qcom,smdtty/qcom,smdtty-data4";
		smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11";
		smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21";
		smd36 = "/soc/qcom,smdtty/smdtty-loopback";
		sdhc1 = "/soc/sdhci@7824900";
		sdhc2 = "/soc/sdhci@7864900";
		spi3 = "/soc/spi@78b7000";
		spi6 = "/soc/spi@7af6000";
		i2c2 = "/soc/i2c@78b6000";
		i2c5 = "/soc/i2c@7af5000";
		i2c3 = "/soc/i2c@78b7000";
		i2c4 = "/soc/i2c@78b8000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x0>;
	};

	firmware {
		phandle = <0x25e>;

		android {
			compatible = "android,firmware";

			vbmeta {
				compatible = "android,vbmeta";
				parts = "vbmeta,boot,system,vendor,dtbo,recovery";
			};

			fstab {
				compatible = "android,fstab";

				vendor {
					compatible = "android,vendor";
					dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor";
					type = "ext4";
					mnt_flags = "ro,barrier=1,discard";
					fsmgr_flags = "wait,avb";
					status = "ok";
				};
			};
		};
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		other_ext_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x85b00000 0x0 0xd00000>;
			phandle = <0x25f>;
		};

		modem_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x86800000 0x0 0x5500000>;
			phandle = <0xd2>;
		};

		adsp_fw_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x8bd00000 0x0 0x1100000>;
			phandle = <0xd6>;
		};

		wcnss_fw_region@0 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0x8ce00000 0x0 0x700000>;
			phandle = <0xd9>;
		};

		venus_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
			alignment = <0x0 0x400000>;
			size = <0x0 0x800000>;
			phandle = <0xda>;
		};

		secure_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alignment = <0x0 0x400000>;
			size = <0x0 0x7000000>;
			status = "disabled";
			phandle = <0x1e>;
		};

		qseecom_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alignment = <0x0 0x400000>;
			size = <0x0 0x1000000>;
			phandle = <0x1f>;
		};

		qseecom_ta_region {
			compatible = "shared-dma-pool";
			alloc-ranges = <0x0 0x0 0x0 0xffffffff>;
			reusable;
			alignment = <0x0 0x400000>;
			size = <0x0 0x400000>;
			phandle = <0x20>;
		};

		adsp_region@0 {
			compatible = "shared-dma-pool";
			reusable;
			alignment = <0x0 0x400000>;
			size = <0x0 0x400000>;
			phandle = <0xdb>;
		};

		splash_region@83000000 {
			reg = <0x0 0x90000000 0x0 0x1400000>;
			phandle = <0x93>;
		};

		mem_dump_region {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x400000>;
			phandle = <0xab>;
		};
	};

	vendor {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x0 0xffffffff>;
		compatible = "simple-bus";
		phandle = <0x260>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	energy-costs {
		compatible = "sched-energy";
		phandle = <0x261>;

		core-cost0 {
			busy-cost-data = <0xea600 0x9f 0x10b170 0xcf 0x130b00 0x100 0x1560a8 0x147 0x16da00 0x157>;
			idle-cost-data = <0x64 0x50 0x3c 0x28>;
			phandle = <0x6>;
		};

		cluster-cost0 {
			busy-cost-data = <0xea600 0x35 0x10b170 0x3d 0x130b00 0x47 0x1560a8 0x55 0x16da00 0x58>;
			idle-cost-data = <0x4 0x3 0x2 0x1>;
			phandle = <0x7>;
		};
	};

	qcom,batterydata {
		qcom,rpull-up-kohm = <0x64>;
		qcom,vref-batt-therm = <0x1b7740>;
		phandle = <0x262>;

		qcom,mlp356477_2800mah {
			qcom,fcc-mah = <0x1068>;
			qcom,batt-id-kohm = <0x52>;
			qcom,rbatt-capacitive-mohm = <0x32>;
			qcom,default-rbatt-mohm = <0x94>;
			qcom,max-voltage-uv = <0x432380>;
			qcom,v-cutoff-uv = <0x33e140>;
			qcom,chg-term-ua = <0x186a0>;
			qcom,battery-type = "mlp356477_2800mah";

			qcom,fcc-temp-lut {
				qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>;
				qcom,lut-data = <0xb2f 0xb28 0xb26 0xb24 0xb19>;
			};

			qcom,ibat-acc-lut {
				qcom,lut-col-legend = <0xffffffec 0x0 0x19>;
				qcom,lut-row-legend = <0x0 0xfa 0x1f4 0x3e8>;
				qcom,lut-data = <0xae8 0xaee 0xaed 0x26a 0xa98 0xadc 0x80 0x988 0xace 0xe 0x70e 0xaa4>;
			};

			qcom,pc-temp-ocv-lut {
				qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>;
				qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>;
				qcom,lut-data = <0x1126 0x1120 0x111a 0x1116 0x110e 0x109c 0x10ce 0x10da 0x10d9 0x10d3 0x1040 0x108e 0x10a0 0x109f 0x109a 0x1007 0x1053 0x1068 0x1066 0x1062 0xfae 0x101e 0x1030 0x1030 0x102a 0xf7a 0xfed 0xffc 0xffa 0xff6 0xf49 0xfb6 0xfca 0xfca 0xfc5 0xf23 0xf78 0xf99 0xf9b 0xf98 0xf0a 0xf4a 0xf6a 0xf6c 0xf6a 0xef8 0xf20 0xf34 0xf36 0xf34 0xee8 0xeff 0xf12 0xf14 0xf13 0xeda 0xee6 0xef8 0xefa 0xef8 0xecb 0xed6 0xee2 0xee4 0xee3 0xebb 0xec9 0xed0 0xed2 0xed0 0xeaa 0xebc 0xebe 0xebe 0xeb8 0xe96 0xeac 0xeac 0xea5 0xe9a 0xe80 0xe96 0xe96 0xe8e 0xe82 0xe6c 0xe80 0xe80 0xe78 0xe6a 0xe58 0xe72 0xe6c 0xe64 0xe5a 0xe48 0xe69 0xe66 0xe60 0xe55 0xe3e 0xe65 0xe65 0xe5f 0xe54 0xe32 0xe61 0xe63 0xe5e 0xe52 0xe24 0xe5c 0xe60 0xe5c 0xe50 0xe14 0xe54 0xe5c 0xe56 0xe46 0xdfc 0xe43 0xe4c 0xe44 0xe2e 0xdde 0xe24 0xe29 0xe1e 0xe06 0xdb4 0xdf6 0xdf7 0xded 0xdd2 0xd75 0xdb6 0xdb6 0xdac 0xd8e 0xd16 0xd5c 0xd5d 0xd55 0xd31 0xc6e 0xcca 0xcd2 0xcc2 0xca0 0xbb8 0xbb8 0xbb8 0xbb8 0xbb8>;
			};

			qcom,rbatt-sf-lut {
				qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>;
				qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1>;
				qcom,lut-data = <0x639 0x178 0x63 0x4b 0x44 0x637 0x178 0x63 0x4b 0x44 0x5af 0x172 0x63 0x4b 0x44 0x56f 0x16a 0x63 0x4c 0x43 0x500 0x166 0x63 0x4c 0x45 0x4dd 0x16b 0x66 0x4e 0x46 0x4bd 0x166 0x6b 0x50 0x48 0x4b0 0x14a 0x70 0x54 0x4a 0x4b7 0x142 0x74 0x59 0x4d 0x4cc 0x137 0x61 0x4c 0x44 0x4ed 0x135 0x5e 0x4a 0x44 0x51d 0x138 0x5e 0x4a 0x44 0x583 0x140 0x60 0x4c 0x46 0x634 0x151 0x61 0x4e 0x48 0x723 0x16c 0x63 0x4f 0x47 0x855 0x18d 0x61 0x4b 0x45 0x9e8 0x1b6 0x61 0x4a 0x45 0xb94 0x1dc 0x64 0x4c 0x44 0xcf1 0x1fd 0x64 0x4a 0x44 0xdd3 0x208 0x64 0x4c 0x44 0xed1 0x218 0x65 0x4c 0x46 0x1002 0x22e 0x68 0x4e 0x48 0x116d 0x245 0x6c 0x52 0x4c 0x131d 0x25d 0x70 0x54 0x4d 0x152d 0x272 0x72 0x52 0x48 0x17db 0x286 0x6f 0x4f 0x48 0x1b5f 0x2a4 0x72 0x50 0x48 0x2075 0x2d7 0x77 0x52 0x4c 0x282d 0x359 0x82 0x59 0x54 0x3800 0x6b3 0x105 0xb2 0xa8>;
			};
		};
	};

	__symbols__ {
		CPU0 = "/cpus/cpu@100";
		L2_1 = "/cpus/cpu@100/l2-cache";
		L1_I_100 = "/cpus/cpu@100/l1-icache";
		L1_D_100 = "/cpus/cpu@100/l1-dcache";
		CPU1 = "/cpus/cpu@101";
		L1_I_101 = "/cpus/cpu@101/l1-icache";
		L1_D_101 = "/cpus/cpu@101/l1-dcache";
		CPU2 = "/cpus/cpu@102";
		L1_I_102 = "/cpus/cpu@102/l1-icache";
		L1_D_102 = "/cpus/cpu@102/l1-dcache";
		CPU3 = "/cpus/cpu@103";
		L1_I_103 = "/cpus/cpu@103/l1-icache";
		L1_D_103 = "/cpus/cpu@103/l1-dcache";
		soc = "/soc";
		tlmm = "/soc/pinctrl@1000000";
		cci0_active = "/soc/pinctrl@1000000/cci/cci0_active";
		cci0_suspend = "/soc/pinctrl@1000000/cci/cci0_suspend";
		cci1_active = "/soc/pinctrl@1000000/cci/cci1_active";
		cci1_suspend = "/soc/pinctrl@1000000/cci/cci1_suspend";
		cam_sensor_mclk0_default = "/soc/pinctrl@1000000/cam_sensor_mclk0_default";
		cam_sensor_mclk0_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk0_sleep";
		cam_sensor_rear_default = "/soc/pinctrl@1000000/cam_sensor_rear_default";
		cam_sensor_rear_sleep = "/soc/pinctrl@1000000/cam_sensor_rear_sleep";
		cam_sensor_rear_vdig = "/soc/pinctrl@1000000/cam_sensor_rear_vdig";
		cam_sensor_rear_vdig_sleep = "/soc/pinctrl@1000000/cam_sensor_rear_vdig_sleep";
		cam_sensor_rear_vdig_qm215 = "/soc/pinctrl@1000000/cam_sensor_rear_vdig_qm215";
		cam_sensor_rear_vdig_sleep_qm215 = "/soc/pinctrl@1000000/cam_sensor_rear_vdig_sleep_qm215";
		cam_sensor_mclk1_default = "/soc/pinctrl@1000000/cam_sensor_mclk1_default";
		cam_sensor_mclk1_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk1_sleep";
		cam_sensor_front_default = "/soc/pinctrl@1000000/cam_sensor_front_default";
		cam_sensor_front_sleep = "/soc/pinctrl@1000000/cam_sensor_front_sleep";
		cam_sensor_mclk2_default = "/soc/pinctrl@1000000/cam_sensor_mclk2_default";
		cam_sensor_mclk2_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk2_sleep";
		cam_sensor_front1_default = "/soc/pinctrl@1000000/cam_sensor_front1_default";
		cam_sensor_front1_sleep = "/soc/pinctrl@1000000/cam_sensor_front1_sleep";
		ts_int_active = "/soc/pinctrl@1000000/pmx_ts_int_active/ts_int_active";
		ts_int_suspend = "/soc/pinctrl@1000000/pmx_ts_int_suspend/ts_int_suspend";
		ts_reset_active = "/soc/pinctrl@1000000/pmx_ts_reset_active/ts_reset_active";
		ts_reset_suspend = "/soc/pinctrl@1000000/pmx_ts_reset_suspend/ts_reset_suspend";
		ts_release = "/soc/pinctrl@1000000/pmx_ts_release/ts_release";
		uart_console_active = "/soc/pinctrl@1000000/pmx-uartconsole/uart_console_active";
		uart_console_sleep = "/soc/pinctrl@1000000/pmx-uartconsole/uart_console_sleep";
		blsp1_uart1_active = "/soc/pinctrl@1000000/blsp1_uart1/blsp1_uart1_active";
		blsp1_uart1_sleep = "/soc/pinctrl@1000000/blsp1_uart1/blsp1_uart1_sleep";
		wcnss_default = "/soc/pinctrl@1000000/wcnss_pmux_5wire/wcnss_default";
		wcnss_sleep = "/soc/pinctrl@1000000/wcnss_pmux_5wire/wcnss_sleep";
		wcnss_pmux_gpio = "/soc/pinctrl@1000000/wcnss_pmux_gpio";
		wcnss_gpio_default = "/soc/pinctrl@1000000/wcnss_pmux_gpio/wcnss_gpio_default";
		cdc_mclk2_sleep = "/soc/pinctrl@1000000/cdc_mclk2_pin/cdc_mclk2_sleep";
		cdc_mclk2_active = "/soc/pinctrl@1000000/cdc_mclk2_pin/cdc_mclk2_active";
		pmx_mdss = "/soc/pinctrl@1000000/pmx_mdss";
		mdss_dsi_active = "/soc/pinctrl@1000000/pmx_mdss/mdss_dsi_active";
		mdss_dsi_suspend = "/soc/pinctrl@1000000/pmx_mdss/mdss_dsi_suspend";
		mdss_te_active = "/soc/pinctrl@1000000/pmx_mdss_te/mdss_te_active";
		mdss_te_suspend = "/soc/pinctrl@1000000/pmx_mdss_te/mdss_te_suspend";
		qdsd_clk_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_sdcard";
		qdsd_clk_trace = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_trace";
		qdsd_clk_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_swdtrc";
		qdsd_clk_spmi = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_spmi";
		qdsd_cmd_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_sdcard";
		qdsd_cmd_trace = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_trace";
		qdsd_cmd_swduart = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_uart";
		qdsd_cmd_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_swdtrc";
		qdsd_cmd_jtag = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_jtag";
		qdsd_cmd_spmi = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_spmi";
		qdsd_data0_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_sdcard";
		qdsd_data0_trace = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_trace";
		qdsd_data0_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_uart";
		qdsd_data0_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_swdtrc";
		qdsd_data0_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_jtag";
		qdsd_data0_spmi = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_spmi";
		qdsd_data1_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_sdcard";
		qdsd_data1_trace = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_trace";
		qdsd_data1_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_uart";
		qdsd_data1_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_swdtrc";
		qdsd_data1_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_jtag";
		qdsd_data2_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_sdcard";
		qdsd_data2_trace = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_trace";
		qdsd_data2_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_uart";
		qdsd_data2_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_swdtrc";
		qdsd_data2_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_jtag";
		qdsd_data3_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_sdcard";
		qdsd_data3_trace = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_trace";
		qdsd_data3_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_uart";
		qdsd_data3_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_swdtrc";
		qdsd_data3_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_jtag";
		qdsd_data3_spmi = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_spmi";
		sdc1_rclk_on = "/soc/pinctrl@1000000/pmx_sdc1_rclk/sdc1_rclk_on";
		sdc1_rclk_off = "/soc/pinctrl@1000000/pmx_sdc1_rclk/sdc1_rclk_off";
		sdc1_clk_on = "/soc/pinctrl@1000000/pmx_sdc1_clk/sdc1_clk_on";
		sdc1_clk_off = "/soc/pinctrl@1000000/pmx_sdc1_clk/sdc1_clk_off";
		sdc1_cmd_on = "/soc/pinctrl@1000000/pmx_sdc1_cmd/sdc1_cmd_on";
		sdc1_cmd_off = "/soc/pinctrl@1000000/pmx_sdc1_cmd/sdc1_cmd_off";
		sdc1_data_on = "/soc/pinctrl@1000000/pmx_sdc1_data/sdc1_data_on";
		sdc1_data_off = "/soc/pinctrl@1000000/pmx_sdc1_data/sdc1_data_off";
		sdc2_cd_on = "/soc/pinctrl@1000000/sdhc2_cd_pin/cd_on";
		sdc2_cd_off = "/soc/pinctrl@1000000/sdhc2_cd_pin/cd_off";
		sdc2_clk_on = "/soc/pinctrl@1000000/pmx_sdc2_clk/sdc2_clk_on";
		sdc2_clk_off = "/soc/pinctrl@1000000/pmx_sdc2_clk/sdc2_clk_off";
		sdc2_cmd_on = "/soc/pinctrl@1000000/pmx_sdc2_cmd/sdc2_cmd_on";
		sdc2_cmd_off = "/soc/pinctrl@1000000/pmx_sdc2_cmd/sdc2_cmd_off";
		sdc2_data_on = "/soc/pinctrl@1000000/pmx_sdc2_data/sdc2_data_on";
		sdc2_data_off = "/soc/pinctrl@1000000/pmx_sdc2_data/sdc2_data_off";
		sdc2_wlan_gpio_active = "/soc/pinctrl@1000000/sdc2_wlan_gpio/sdc2_wlan_gpio_active";
		sdc2_wlan_gpio_sleep = "/soc/pinctrl@1000000/sdc2_wlan_gpio/sdc2_wlan_gpio_sleep";
		wcd_intr_default = "/soc/pinctrl@1000000/wcd9xxx_intr/wcd_intr_default";
		pri_mi2s_mclk_b_default = "/soc/pinctrl@1000000/pri_mi2s_mclk_b_lines/pri_mi2s_mclk_default";
		sec_mi2s_mclk_a_active = "/soc/pinctrl@1000000/sec_mi2s_mclk_a_lines/sec_mi2s_mclk_a_active";
		sec_mi2s_mclk_a_sleep = "/soc/pinctrl@1000000/sec_mi2s_mclk_a_lines/sec_mi2s_mclk_a_sleep";
		cdc_reset_sleep = "/soc/pinctrl@1000000/cdc_reset_ctrl/cdc_reset_sleep";
		cdc_reset_active = "/soc/pinctrl@1000000/cdc_reset_ctrl/cdc_reset_active";
		cdc_pdm_lines_2_act = "/soc/pinctrl@1000000/cdc-pdm-2-lines/pdm_lines_2_on";
		cdc_pdm_lines_2_sus = "/soc/pinctrl@1000000/cdc-pdm-2-lines/pdm_lines_2_off";
		cdc_pdm_lines_act = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm_lines_on";
		cdc_pdm_lines_sus = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm_lines_off";
		cross_conn_det_act = "/soc/pinctrl@1000000/cross-conn-det/lines_on";
		cross_conn_det_sus = "/soc/pinctrl@1000000/cross-conn-det/lines_off";
		wsa_vi_on = "/soc/pinctrl@1000000/wsa-vi/wsa_vi_on";
		wsa_vi_off = "/soc/pinctrl@1000000/wsa-vi/wsa_vi_off";
		wsa_reset_on = "/soc/pinctrl@1000000/wsa_reset/wsa_reset_on";
		wsa_reset_off = "/soc/pinctrl@1000000/wsa_reset/wsa_reset_off";
		wsa_clk_on = "/soc/pinctrl@1000000/wsa_clk/wsa_clk_on";
		wsa_clk_off = "/soc/pinctrl@1000000/wsa_clk/wsa_clk_off";
		pri_tlmm_lines_act = "/soc/pinctrl@1000000/pri-tlmm-lines/pri_tlmm_lines_act";
		pri_tlmm_lines_sus = "/soc/pinctrl@1000000/pri-tlmm-lines/pri_tlmm_lines_sus";
		pri_tlmm_ws_act = "/soc/pinctrl@1000000/pri-tlmm-ws-lines/pri_tlmm_ws_act";
		pri_tlmm_ws_sus = "/soc/pinctrl@1000000/pri-tlmm-ws-lines/pri_tlmm_ws_sus";
		spi3_default = "/soc/pinctrl@1000000/spi3/spi3_default";
		spi3_sleep = "/soc/pinctrl@1000000/spi3/spi3_sleep";
		spi3_cs0_active = "/soc/pinctrl@1000000/spi3/cs0_active";
		spi3_cs0_sleep = "/soc/pinctrl@1000000/spi3/cs0_sleep";
		spi6_default = "/soc/pinctrl@1000000/spi6/spi6_default";
		spi6_sleep = "/soc/pinctrl@1000000/spi6/spi6_sleep";
		spi6_cs0_active = "/soc/pinctrl@1000000/spi6/cs0_active";
		spi6_cs0_sleep = "/soc/pinctrl@1000000/spi6/cs0_sleep";
		spi6_cs1_active = "/soc/pinctrl@1000000/spi6/cs1_active";
		spi6_cs1_sleep = "/soc/pinctrl@1000000/spi6/cs1_sleep";
		fpc_reset_low = "/soc/pinctrl@1000000/fpc_reset_int/reset_low";
		fpc_reset_high = "/soc/pinctrl@1000000/fpc_reset_int/reset_high";
		fpc_int_low = "/soc/pinctrl@1000000/fpc_reset_int/int_low";
		i2c_2_active = "/soc/pinctrl@1000000/i2c_2/i2c_2_active";
		i2c_2_sleep = "/soc/pinctrl@1000000/i2c_2/i2c_2_sleep";
		i2c_3_active = "/soc/pinctrl@1000000/i2c_3/i2c_3_active";
		i2c_3_sleep = "/soc/pinctrl@1000000/i2c_3/i2c_3_sleep";
		i2c_4_active = "/soc/pinctrl@1000000/i2c_4/i2c_4_active";
		i2c_4_sleep = "/soc/pinctrl@1000000/i2c_4/i2c_4_sleep";
		i2c_5_active = "/soc/pinctrl@1000000/i2c_5/i2c_5_active";
		i2c_5_sleep = "/soc/pinctrl@1000000/i2c_5/i2c_5_sleep";
		i2c_6_active = "/soc/pinctrl@1000000/i2c_6/i2c_6_active";
		i2c_6_sleep = "/soc/pinctrl@1000000/i2c_6/i2c_6_sleep";
		nfc_int_active = "/soc/pinctrl@1000000/nfc/nfc_int_active";
		nfc_int_suspend = "/soc/pinctrl@1000000/nfc/nfc_int_suspend";
		nfc_disable_active = "/soc/pinctrl@1000000/nfc/nfc_disable_active";
		nfc_disable_suspend = "/soc/pinctrl@1000000/nfc/nfc_disable_suspend";
		gpio_key_active = "/soc/pinctrl@1000000/tlmm_gpio_key/gpio_key_active";
		gpio_key_suspend = "/soc/pinctrl@1000000/tlmm_gpio_key/gpio_key_suspend";
		rear_flash_led_enable = "/soc/pinctrl@1000000/tlmm_pmi_flash_led/rear_flash_led_enable";
		rear_flash_led_disable = "/soc/pinctrl@1000000/tlmm_pmi_flash_led/rear_flash_led_disable";
		front_flash_led_enable = "/soc/pinctrl@1000000/tlmm_pmi_flash_led/front_flash_led_enable";
		front_flash_led_disable = "/soc/pinctrl@1000000/tlmm_pmi_flash_led/front_flash_led_disable";
		usbc_int_default = "/soc/pinctrl@1000000/usbc_int_default";
		pri_mi2s_sck_sleep = "/soc/pinctrl@1000000/pri_mi2s_sck/pri_mi2s_sck_sleep";
		pri_mi2s_sck_active = "/soc/pinctrl@1000000/pri_mi2s_sck/pri_mi2s_sck_active";
		pri_mi2s_sd0_sleep = "/soc/pinctrl@1000000/pri_mi2s_sd0/pri_mi2s_sd0_sleep";
		pri_mi2s_sd0_active = "/soc/pinctrl@1000000/pri_mi2s_sd0/pri_mi2s_sd0_active";
		pri_mi2s_sd1_sleep = "/soc/pinctrl@1000000/pri_mi2s_sd1/pri_mi2s_sd1_sleep";
		pri_mi2s_sd1_active = "/soc/pinctrl@1000000/pri_mi2s_sd1/pri_mi2s_sd1_active";
		sec_mi2s_ws_sleep = "/soc/pinctrl@1000000/sec_mi2s_ws/sec_mi2s_ws_sleep";
		sec_mi2s_ws_active = "/soc/pinctrl@1000000/sec_mi2s_ws/sec_mi2s_ws_active";
		sec_mi2s_sck_sleep = "/soc/pinctrl@1000000/sec_mi2s_sck/sec_mi2s_sck_sleep";
		sec_mi2s_sck_active = "/soc/pinctrl@1000000/sec_mi2s_sck/sec_mi2s_sck_active";
		sec_mi2s_sd0_sleep = "/soc/pinctrl@1000000/sec_mi2s_sd0/sec_mi2s_sd0_sleep";
		sec_mi2s_sd0_active = "/soc/pinctrl@1000000/sec_mi2s_sd0/sec_mi2s_sd0_active";
		sec_mi2s_sd1_sleep = "/soc/pinctrl@1000000/sec_mi2s_sd1/sec_mi2s_sd1_sleep";
		sec_mi2s_sd1_active = "/soc/pinctrl@1000000/sec_mi2s_sd1/sec_mi2s_sd1_active";
		usb_mode_select = "/soc/pinctrl@1000000/usb_mode_select";
		usb2533_hub_reset = "/soc/pinctrl@1000000/usb2533_hub_reset";
		vfe0 = "/soc/qcom,vfe0@1b10000";
		vfe1 = "/soc/qcom,vfe1@1b14000";
		msm_cam_smmu_cb1 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb1";
		msm_cam_smmu_cb2 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb2";
		msm_cam_smmu_cb3 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb3";
		msm_cam_smmu_cb4 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb4";
		cci = "/soc/qcom,cci@1b0c000";
		i2c_freq_100Khz = "/soc/qcom,cci@1b0c000/qcom,i2c_standard_mode";
		i2c_freq_400Khz = "/soc/qcom,cci@1b0c000/qcom,i2c_fast_mode";
		i2c_freq_custom = "/soc/qcom,cci@1b0c000/qcom,i2c_custom_mode";
		i2c_freq_1Mhz = "/soc/qcom,cci@1b0c000/qcom,i2c_fast_plus_mode";
		smp2pgpio_smp2p_15_in = "/soc/qcom,smp2pgpio-smp2p-15-in";
		smp2pgpio_smp2p_15_out = "/soc/qcom,smp2pgpio-smp2p-15-out";
		smp2pgpio_smp2p_1_in = "/soc/qcom,smp2pgpio-smp2p-1-in";
		smp2pgpio_smp2p_1_out = "/soc/qcom,smp2pgpio-smp2p-1-out";
		smp2pgpio_smp2p_4_in = "/soc/qcom,smp2pgpio-smp2p-4-in";
		smp2pgpio_smp2p_4_out = "/soc/qcom,smp2pgpio-smp2p-4-out";
		smp2pgpio_smp2p_2_in = "/soc/qcom,smp2pgpio-smp2p-2-in";
		smp2pgpio_smp2p_2_out = "/soc/qcom,smp2pgpio-smp2p-2-out";
		smp2pgpio_ssr_smp2p_1_in = "/soc/qcom,smp2pgpio-ssr-smp2p-1-in";
		smp2pgpio_ssr_smp2p_1_out = "/soc/qcom,smp2pgpio-ssr-smp2p-1-out";
		smp2pgpio_ssr_smp2p_2_in = "/soc/qcom,smp2pgpio-ssr-smp2p-2-in";
		smp2pgpio_ssr_smp2p_2_out = "/soc/qcom,smp2pgpio-ssr-smp2p-2-out";
		smp2pgpio_ssr_smp2p_4_in = "/soc/qcom,smp2pgpio-ssr-smp2p-4-in";
		smp2pgpio_ssr_smp2p_4_out = "/soc/qcom,smp2pgpio-ssr-smp2p-4-out";
		tmc_etr = "/soc/tmc@6028000";
		tmc_etr_in_replicator = "/soc/tmc@6028000/port/endpoint";
		tmc_etf = "/soc/tmc@6027000";
		tmc_etf_out_replicator = "/soc/tmc@6027000/ports/port@0/endpoint";
		tmc_etf_in_funnel_in0 = "/soc/tmc@6027000/ports/port@1/endpoint";
		replicator = "/soc/replicator@6026000";
		replicator_out_tmc_etr = "/soc/replicator@6026000/ports/port@0/endpoint";
		replicator_in_tmc_etf = "/soc/replicator@6026000/ports/port@1/endpoint";
		funnel_in0 = "/soc/funnel@6021000";
		funnel_in0_out_tmc_etf = "/soc/funnel@6021000/ports/port@0/endpoint";
		funnel_in0_in_stm = "/soc/funnel@6021000/ports/port@1/endpoint";
		funnel_in0_in_tpda = "/soc/funnel@6021000/ports/port@2/endpoint";
		funnel_in0_in_funnel_center = "/soc/funnel@6021000/ports/port@3/endpoint";
		funnel_in0_in_funnel_right = "/soc/funnel@6021000/ports/port@4/endpoint";
		funnel_in0_in_funnel_mm = "/soc/funnel@6021000/ports/port@5/endpoint";
		funnel_center = "/soc/funnel@6100000";
		funnel_center_out_funnel_in0 = "/soc/funnel@6100000/ports/port@0/endpoint";
		funnel_center_in_rpm_etm0 = "/soc/funnel@6100000/ports/port@1/endpoint";
		funnel_center_in_dbgui = "/soc/funnel@6100000/ports/port@2/endpoint";
		funnel_right = "/soc/funnel@6120000";
		funnel_right_out_funnel_in0 = "/soc/funnel@6120000/ports/port@0/endpoint";
		funnel_right_in_modem_etm0 = "/soc/funnel@6120000/ports/port@1/endpoint";
		funnel_right_in_funnel_apss = "/soc/funnel@6120000/ports/port@2/endpoint";
		funnel_mm = "/soc/funnel@6130000";
		funnel_mm_out_funnel_in0 = "/soc/funnel@6130000/ports/port@0/endpoint";
		funnel_mm_in_wcn_etm0 = "/soc/funnel@6130000/ports/port@1/endpoint";
		funnel_mm_in_funnel_cam = "/soc/funnel@6130000/ports/port@2/endpoint";
		funnel_mm_in_audio_etm0 = "/soc/funnel@6130000/ports/port@3/endpoint";
		funnel_cam = "/soc/funnel@6132000";
		funnel_cam_out_funnel_mm = "/soc/funnel@6132000/port/endpoint";
		funnel_apss = "/soc/funnel@61a1000";
		funnel_apss_out_funnel_right = "/soc/funnel@61a1000/ports/port@0/endpoint";
		funnel_apss0_in_etm0 = "/soc/funnel@61a1000/ports/port@5/endpoint";
		funnel_apss0_in_etm1 = "/soc/funnel@61a1000/ports/port@6/endpoint";
		funnel_apss0_in_etm2 = "/soc/funnel@61a1000/ports/port@7/endpoint";
		funnel_apss0_in_etm3 = "/soc/funnel@61a1000/ports/port@8/endpoint";
		etm0 = "/soc/etm@61bc000";
		etm0_out_funnel_apss0 = "/soc/etm@61bc000/port/endpoint";
		etm1 = "/soc/etm@61bd000";
		etm1_out_funnel_apss0 = "/soc/etm@61bd000/port/endpoint";
		etm2 = "/soc/etm@61be000";
		etm2_out_funnel_apss0 = "/soc/etm@61be000/port/endpoint";
		etm3 = "/soc/etm@61bf000";
		etm3_out_funnel_apss0 = "/soc/etm@61bf000/port/endpoint";
		stm = "/soc/stm@6002000";
		stm_out_funnel_in0 = "/soc/stm@6002000/port/endpoint";
		cti0 = "/soc/cti@6010000";
		cti1 = "/soc/cti@6011000";
		cti2 = "/soc/cti@6012000";
		cti3 = "/soc/cti@6013000";
		cti4 = "/soc/cti@6014000";
		cti5 = "/soc/cti@6015000";
		cti6 = "/soc/cti@6016000";
		cti7 = "/soc/cti@6017000";
		cti8 = "/soc/cti@6018000";
		cti9 = "/soc/cti@6019000";
		cti10 = "/soc/cti@601a000";
		cti11 = "/soc/cti@601b000";
		cti12 = "/soc/cti@601c000";
		cti13 = "/soc/cti@601d000";
		cti14 = "/soc/cti@601e000";
		cti15 = "/soc/cti@601f000";
		cti_cpu0 = "/soc/cti@61b8000";
		cti_cpu1 = "/soc/cti@61b9000";
		cti_cpu2 = "/soc/cti@61ba000";
		cti_cpu3 = "/soc/cti@61bb000";
		cti_modem_cpu0 = "/soc/cti@6124000";
		cti_video_cpu0 = "/soc/cti@6134000";
		cti_wcn_cpu0 = "/soc/cti@6139000";
		cti_audio_cpu0 = "/soc/cti@613c000";
		cti_rpm_cpu0 = "/soc/cti@610c000";
		wcn_etm0_out_funnel_mm = "/soc/wcn_etm0/port/endpoint";
		rpm_etm0_out_funnel_center = "/soc/rpm_etm0/port/endpoint";
		audio_etm0_out_funnel_mm = "/soc/audio_etm0/port/endpoint";
		modem_etm0_out_funnel_right = "/soc/modem_etm0/port/endpoint";
		csr = "/soc/csr@6001000";
		dbgui = "/soc/dbgui@6108000";
		dbgui_out_funnel_center = "/soc/dbgui@6108000/port/endpoint";
		tpda = "/soc/tpda@6003000";
		tpda_out_funnel_in0 = "/soc/tpda@6003000/ports/port@0/endpoint";
		tpda_in_tpdm_dcc = "/soc/tpda@6003000/ports/port@1/endpoint";
		tpdm_dcc = "/soc/tpdm@6110000";
		tpdm_dcc_out_tpda = "/soc/tpdm@6110000/port/endpoint";
		hwevent = "/soc/hwevent@6101000";
		ad_hoc_bus = "/soc/ad-hoc-bus@580000";
		fab_bimc = "/soc/ad-hoc-bus@580000/fab-bimc";
		fab_pcnoc = "/soc/ad-hoc-bus@580000/fab-pcnoc";
		fab_snoc = "/soc/ad-hoc-bus@580000/fab-snoc";
		fab_snoc_mm = "/soc/ad-hoc-bus@580000/fab-snoc-mm";
		mas_apps_proc = "/soc/ad-hoc-bus@580000/mas-apps-proc";
		mas_oxili = "/soc/ad-hoc-bus@580000/mas-oxili";
		mas_snoc_bimc_0 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-0";
		mas_snoc_bimc_2 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-2";
		mas_snoc_bimc_1 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-1";
		mas_tcu_0 = "/soc/ad-hoc-bus@580000/mas-tcu-0";
		mas_spdm = "/soc/ad-hoc-bus@580000/mas-spdm";
		mas_blsp_1 = "/soc/ad-hoc-bus@580000/mas-blsp-1";
		mas_blsp_2 = "/soc/ad-hoc-bus@580000/mas-blsp-2";
		mas_usb_hs1 = "/soc/ad-hoc-bus@580000/mas-usb-hs1";
		mas_xi_usb_hs1 = "/soc/ad-hoc-bus@580000/mas-xi-usb-hs1";
		mas_crypto = "/soc/ad-hoc-bus@580000/mas-crypto";
		mas_sdcc_1 = "/soc/ad-hoc-bus@580000/mas-sdcc-1";
		mas_sdcc_2 = "/soc/ad-hoc-bus@580000/mas-sdcc-2";
		mas_snoc_pcnoc = "/soc/ad-hoc-bus@580000/mas-snoc-pcnoc";
		mas_qdss_bam = "/soc/ad-hoc-bus@580000/mas-qdss-bam";
		mas_bimc_snoc = "/soc/ad-hoc-bus@580000/mas-bimc-snoc";
		mas_jpeg = "/soc/ad-hoc-bus@580000/mas-jpeg";
		mas_mdp = "/soc/ad-hoc-bus@580000/mas-mdp";
		mas_pcnoc_snoc = "/soc/ad-hoc-bus@580000/mas-pcnoc-snoc";
		mas_venus = "/soc/ad-hoc-bus@580000/mas-venus";
		mas_vfe0 = "/soc/ad-hoc-bus@580000/mas-vfe0";
		mas_vfe1 = "/soc/ad-hoc-bus@580000/mas-vfe1";
		mas_cpp = "/soc/ad-hoc-bus@580000/mas-cpp";
		mas_qdss_etr = "/soc/ad-hoc-bus@580000/mas-qdss-etr";
		pcnoc_m_0 = "/soc/ad-hoc-bus@580000/pcnoc-m-0";
		pcnoc_m_1 = "/soc/ad-hoc-bus@580000/pcnoc-m-1";
		pcnoc_int_0 = "/soc/ad-hoc-bus@580000/pcnoc-int-0";
		pcnoc_int_1 = "/soc/ad-hoc-bus@580000/pcnoc-int-1";
		pcnoc_int_2 = "/soc/ad-hoc-bus@580000/pcnoc-int-2";
		pcnoc_int_3 = "/soc/ad-hoc-bus@580000/pcnoc-int-3";
		pcnoc_s_0 = "/soc/ad-hoc-bus@580000/pcnoc-s-0";
		pcnoc_s_1 = "/soc/ad-hoc-bus@580000/pcnoc-s-1";
		pcnoc_s_2 = "/soc/ad-hoc-bus@580000/pcnoc-s-2";
		pcnoc_s_3 = "/soc/ad-hoc-bus@580000/pcnoc-s-3";
		pcnoc_s_4 = "/soc/ad-hoc-bus@580000/pcnoc-s-4";
		pcnoc_s_6 = "/soc/ad-hoc-bus@580000/pcnoc-s-6";
		pcnoc_s_7 = "/soc/ad-hoc-bus@580000/pcnoc-s-7";
		pcnoc_s_8 = "/soc/ad-hoc-bus@580000/pcnoc-s-8";
		qdss_int = "/soc/ad-hoc-bus@580000/qdss-int";
		snoc_int_0 = "/soc/ad-hoc-bus@580000/snoc-int-0";
		snoc_int_1 = "/soc/ad-hoc-bus@580000/snoc-int-1";
		snoc_int_2 = "/soc/ad-hoc-bus@580000/snoc-int-2";
		slv_ebi = "/soc/ad-hoc-bus@580000/slv-ebi";
		slv_bimc_snoc = "/soc/ad-hoc-bus@580000/slv-bimc-snoc";
		slv_sdcc_2 = "/soc/ad-hoc-bus@580000/slv-sdcc-2";
		slv_spdm = "/soc/ad-hoc-bus@580000/slv-spdm";
		slv_pdm = "/soc/ad-hoc-bus@580000/slv-pdm";
		slv_prng = "/soc/ad-hoc-bus@580000/slv-prng";
		slv_tcsr = "/soc/ad-hoc-bus@580000/slv-tcsr";
		slv_snoc_cfg = "/soc/ad-hoc-bus@580000/slv-snoc-cfg";
		slv_message_ram = "/soc/ad-hoc-bus@580000/slv-message-ram";
		slv_camera_ss_cfg = "/soc/ad-hoc-bus@580000/slv-camera-ss-cfg";
		slv_disp_ss_cfg = "/soc/ad-hoc-bus@580000/slv-disp-ss-cfg";
		slv_venus_cfg = "/soc/ad-hoc-bus@580000/slv-venus-cfg";
		slv_gpu_cfg = "/soc/ad-hoc-bus@580000/slv-gpu-cfg";
		slv_tlmm = "/soc/ad-hoc-bus@580000/slv-tlmm";
		slv_blsp_1 = "/soc/ad-hoc-bus@580000/slv-blsp-1";
		slv_blsp_2 = "/soc/ad-hoc-bus@580000/slv-blsp-2";
		slv_pmic_arb = "/soc/ad-hoc-bus@580000/slv-pmic-arb";
		slv_sdcc_1 = "/soc/ad-hoc-bus@580000/slv-sdcc-1";
		slv_crypto_0_cfg = "/soc/ad-hoc-bus@580000/slv-crypto-0-cfg";
		slv_usb_hs = "/soc/ad-hoc-bus@580000/slv-usb-hs";
		slv_tcu = "/soc/ad-hoc-bus@580000/slv-tcu";
		slv_pcnoc_snoc = "/soc/ad-hoc-bus@580000/slv-pcnoc-snoc";
		slv_kpss_ahb = "/soc/ad-hoc-bus@580000/slv-kpss-ahb";
		slv_wcss = "/soc/ad-hoc-bus@580000/slv-wcss";
		slv_snoc_bimc_0 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-0";
		slv_snoc_bimc_1 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-1";
		slv_snoc_bimc_2 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-2";
		slv_imem = "/soc/ad-hoc-bus@580000/slv-imem";
		slv_snoc_pcnoc = "/soc/ad-hoc-bus@580000/slv-snoc-pcnoc";
		slv_qdss_stm = "/soc/ad-hoc-bus@580000/slv-qdss-stm";
		slv_cats_0 = "/soc/ad-hoc-bus@580000/slv-cats-0";
		slv_cats_1 = "/soc/ad-hoc-bus@580000/slv-cats-1";
		slv_lpass = "/soc/ad-hoc-bus@580000/slv-lpass";
		mdss_mdp = "/soc/qcom,mdss_mdp@1a00000";
		smmu_mdp_unsec = "/soc/qcom,mdss_mdp@1a00000/qcom,smmu_mdp_unsec_cb";
		smmu_mdp_sec = "/soc/qcom,mdss_mdp@1a00000/qcom,smmu_mdp_sec_cb";
		mdss_fb0 = "/soc/qcom,mdss_mdp@1a00000/qcom,mdss_fb_primary";
		mdss_fb1 = "/soc/qcom,mdss_mdp@1a00000/qcom,mdss_fb_wfd";
		mdss_dsi = "/soc/qcom,mdss_dsi@0";
		mdss_dsi0 = "/soc/qcom,mdss_dsi@0/qcom,mdss_dsi_ctrl0@1a94000";
		mdss_rotator = "/soc/qcom,mdss_rotator";
		mdss_dsi0_pll = "/soc/qcom,mdss_dsi_pll@1a94a00";
		gfx_iommu = "/soc/qcom,iommu@1f00000";
		apps_iommu = "/soc/qcom,iommu@1e00000";
		msm_bus = "/soc/qcom,kgsl-busmon";
		gpubw = "/soc/qcom,gpubw";
		msm_gpu = "/soc/qcom,kgsl-3d0@1c00000";
		kgsl_msm_iommu = "/soc/qcom,kgsl-iommu@1f00000";
		gfx3d_user = "/soc/qcom,kgsl-iommu@1f00000/gfx3d_user";
		intc = "/soc/interrupt-controller@b000000";
		dcc = "/soc/dcc@b3000";
		wakegic = "/soc/wake-gic";
		wakegpio = "/soc/wake-gpio";
		thermal_zones = "/soc/thermal-zones";
		cpu_trip = "/soc/thermal-zones/penta-cpu-max-step/trips/cpu-trip";
		gpu_step_trip = "/soc/thermal-zones/gpu0-step/trips/gpu-step-trip";
		apc1_cpu0_trip = "/soc/thermal-zones/apc1-cpu0-step/trips/apc1-cpu0-trip";
		apc1_cpu1_trip = "/soc/thermal-zones/apc1-cpu1-step/trips/apc1-cpu1--trip";
		apc1_cpu2_trip = "/soc/thermal-zones/apc1-cpu2-step/trips/apc1-cpu2-trip";
		apc1_cpu3_trip = "/soc/thermal-zones/apc1-cpu3-step/trips/apc1-cpu3-trip";
		aoss_lowf = "/soc/thermal-zones/aoss0-lowf/trips/aoss-lowf";
		pm8916_trip0 = "/soc/thermal-zones/pm8916_tz/trips/pm8916-trip0";
		pm8916_trip1 = "/soc/thermal-zones/pm8916_tz/trips/pm8916-trip1";
		pm8916_trip2 = "/soc/thermal-zones/pm8916_tz/trips/pm8916-trip2";
		tsens0 = "/soc/tsens@4a8000";
		slim_msm = "/soc/slim@c140000";
		blsp1_uart2 = "/soc/serial@78b0000";
		blsp1_uart1 = "/soc/uart@78af000";
		dma_blsp1 = "/soc/qcom,sps-dma@7884000";
		dma_blsp2 = "/soc/qcom,sps-dma@7ac4000";
		i2c_4 = "/soc/i2c@78b8000";
		rpm_bus = "/soc/qcom,rpm-smd";
		pm8916_s1_level = "/soc/qcom,rpm-smd/rpm-regulator-smpa1/regulator-s1-level";
		pm8916_s1_level_ao = "/soc/qcom,rpm-smd/rpm-regulator-smpa1/regulator-s1-level-ao";
		pm8916_s1_floor_level = "/soc/qcom,rpm-smd/rpm-regulator-smpa1/regulator-s1-floor-level";
		pm8916_cx_cdev = "/soc/qcom,rpm-smd/rpm-regulator-smpa1/regulator-cx-cdev";
		pm8916_s3 = "/soc/qcom,rpm-smd/rpm-regulator-smpa3/regulator-s3";
		pm8916_s4 = "/soc/qcom,rpm-smd/rpm-regulator-smpa4/regulator-s4";
		pm8916_l2 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa2/regulator-l2";
		pm8916_l2_level_ao = "/soc/qcom,rpm-smd/rpm-regulator-ldoa2/regulator-l2-level-ao";
		pm8916_l2_level_so = "/soc/qcom,rpm-smd/rpm-regulator-ldoa2/regulator-l2-level-so";
		pm8916_l3 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa3/regulator-l3";
		pm8916_l5 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa5/regulator-l5";
		pm8916_l6 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa6/regulator-l6";
		pm8916_l7 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa7/regulator-l7";
		pm8916_l7_ao = "/soc/qcom,rpm-smd/rpm-regulator-ldoa7/regulator-l7-ao";
		pm8916_l7_so = "/soc/qcom,rpm-smd/rpm-regulator-ldoa7/regulator-l7-so";
		pm8916_l8 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa8/regulator-l8";
		pm8916_l9 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa9/regulator-l9";
		pm8916_l10 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa10/regulator-l10";
		pm8916_l11 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa11/regulator-l11";
		pm8916_l12 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa12/regulator-l12";
		pm8916_l13 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa13/regulator-l13";
		pm8916_l14 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa14/regulator-l14";
		pm8916_l15 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa15/regulator-l15";
		pm8916_l16 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa16/regulator-l16";
		pm8916_l17 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa17/regulator-l17";
		pm8916_l1 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa1/regulator-l1";
		pm8916_l4 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa4/regulator-l4";
		pm8916_l18 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa18/regulator-l18";
		clock_gcc = "/soc/qcom,gcc@1800000";
		clock_debug = "/soc/qcom,cc-debug@1874000";
		clock_gcc_mdss = "/soc/qcom,gcc-mdss@1800000";
		clock_cpu = "/soc/qcom,cpu-clock-8939@b111050";
		msm_cpufreq = "/soc/qcom,msm-cpufreq";
		i2c_2 = "/soc/i2c@78b6000";
		i2c_3 = "/soc/i2c@78b7000";
		i2c_5 = "/soc/i2c@7af5000";
		spi_3 = "/soc/spi@78b7000";
		usb_otg = "/soc/usb@78db000";
		cpubw = "/soc/qcom,cpubw";
		mincpubw = "/soc/qcom,mincpubw";
		mem_client_3_size = "/soc/qcom,memshare/qcom,client_3";
		spmi_bus = "/soc/qcom,spmi@200f000";
		pm8916_0 = "/soc/qcom,spmi@200f000/pm8916@0";
		pm8916_revid = "/soc/qcom,spmi@200f000/pm8916@0/qcom,revid@100";
		pm8916_pon = "/soc/qcom,spmi@200f000/pm8916@0/qcom,power-on@800";
		pm8916_gpios = "/soc/qcom,spmi@200f000/pm8916@0/pinctrl@c000";
		disp_vdda_en_default = "/soc/qcom,spmi@200f000/pm8916@0/pinctrl@c000/disp_vdda_en_default";
		pm8916_mpps = "/soc/qcom,spmi@200f000/pm8916@0/mpps@a000";
		pm8916_coincell = "/soc/qcom,spmi@200f000/pm8916@0/qcom,coincell@2800";
		pm8916_rtc = "/soc/qcom,spmi@200f000/pm8916@0/qcom,pm8916_rtc";
		pm8916_vadc = "/soc/qcom,spmi@200f000/pm8916@0/vadc@3100";
		pm8916_tz = "/soc/qcom,spmi@200f000/pm8916@0/qcom,temp-alarm@2400";
		pm8916_adc_tm = "/soc/qcom,spmi@200f000/pm8916@0/vadc@3400";
		pm8916_chg = "/soc/qcom,spmi@200f000/pm8916@0/qcom,charger";
		pm8916_bms = "/soc/qcom,spmi@200f000/pm8916@0/qcom,vmbms";
		pm8916_leds = "/soc/qcom,spmi@200f000/pm8916@0/qcom,leds@a100";
		pm8916_1 = "/soc/qcom,spmi@200f000/pm8916@1";
		pm8916_pwm = "/soc/qcom,spmi@200f000/pm8916@1/qcom,pwms@bc00";
		pm8916_vib = "/soc/qcom,spmi@200f000/pm8916@1/qcom,vibrator@c000";
		pm8916_tombak_analog = "/soc/qcom,spmi@200f000/pm8916@1/msm8x16_wcd_codec@f100";
		pm8916_s2 = "/soc/qcom,spmi@200f000/pm8916@1/spm-regulator@1700";
		pmic_analog_codec = "/soc/qcom,spmi@200f000/pm8916@1/analog-codec@f000";
		msm_digital_codec = "/soc/qcom,spmi@200f000/pm8916@1/analog-codec@f000/msm-dig-codec";
		jtag_fuse = "/soc/jtagfuse@a601c";
		jtag_mm0 = "/soc/jtagmm@61bc000";
		jtag_mm1 = "/soc/jtagmm@61bd000";
		jtag_mm2 = "/soc/jtagmm@61be000";
		jtag_mm3 = "/soc/jtagmm@61bf000";
		smdtty_apps_fm = "/soc/qcom,smdtty/qcom,smdtty-apps-fm";
		smdtty_apps_riva_bt_acl = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl";
		smdtty_apps_riva_bt_cmd = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd";
		smdtty_mbalbridge = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge";
		smdtty_apps_riva_ant_cmd = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd";
		smdtty_apps_riva_ant_data = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data";
		smdtty_data1 = "/soc/qcom,smdtty/qcom,smdtty-data1";
		smdtty_data4 = "/soc/qcom,smdtty/qcom,smdtty-data4";
		smdtty_data11 = "/soc/qcom,smdtty/qcom,smdtty-data11";
		smdtty_data21 = "/soc/qcom,smdtty/qcom,smdtty-data21";
		smdtty_loopback = "/soc/qcom,smdtty/smdtty-loopback";
		qcom_tzlog = "/soc/tz-log@8600720";
		bam_dmux = "/soc/qcom,bam_dmux@4044000";
		sdcc1_ice = "/soc/sdcc1ice@7803000";
		sdhc_1 = "/soc/sdhci@7824900";
		sdhc_2 = "/soc/sdhci@7864900";
		qcom_seecom = "/soc/qseecom@85b00000";
		qcom_rng = "/soc/qrng@e3000";
		qcom_crypto = "/soc/qcrypto@720000";
		qcom_cedev = "/soc/qcedev@720000";
		spi_6 = "/soc/spi@7af6000";
		ssc_sensors = "/soc/qcom,msm-ssc-sensors";
		mem_acc_vreg_corner = "/soc/regulator@01946004";
		apc_vreg_corner = "/soc/regulator@b018000";
		gdsc_venus = "/soc/qcom,gdsc@184c018";
		gdsc_mdss = "/soc/qcom,gdsc@184d078";
		gdsc_jpeg = "/soc/qcom,gdsc@185701c";
		gdsc_vfe = "/soc/qcom,gdsc@1858034";
		gdsc_vfe1 = "/soc/qcom,gdsc@185806c";
		gdsc_cpp = "/soc/qcom,gdsc@1858078";
		gdsc_oxili_gx = "/soc/qcom,gdsc@185901c";
		gdsc_venus_core0 = "/soc/qcom,gdsc@184c028";
		gdsc_venus_core1 = "/soc/qcom,gdsc@184c030";
		gdsc_oxili_cx = "/soc/qcom,gdsc@185904c";
		gdsc_usb30 = "/soc/qcom,gdsc@183f078";
		modem_pa = "/soc/qmi-tmd-devices/modem/modem_pa";
		modem_proc = "/soc/qmi-tmd-devices/modem/modem_proc";
		modem_current = "/soc/qmi-tmd-devices/modem/modem_current";
		modem_vdd = "/soc/qmi-tmd-devices/modem/modem_vdd";
		disp_vdda_eldo1 = "/soc/gpio-regulator@0";
		usb_vdig_supply = "/soc/usb_vdig_supply";
		pcm0 = "/soc/qcom,msm-pcm";
		routing = "/soc/qcom,msm-pcm-routing";
		compr = "/soc/qcom,msm-compr-dsp";
		pcm1 = "/soc/qcom,msm-pcm-low-latency";
		pcm2 = "/soc/qcom,msm-ultra-low-latency";
		pcm_noirq = "/soc/qcom,msm-pcm-dsp-noirq";
		compress = "/soc/qcom,msm-compress-dsp";
		voip = "/soc/qcom,msm-voip-dsp";
		voice = "/soc/qcom,msm-pcm-voice";
		stub_codec = "/soc/qcom,msm-stub-codec";
		afe = "/soc/qcom,msm-pcm-afe";
		dai_hdmi = "/soc/qcom,msm-dai-q6-hdmi";
		dai_dp = "/soc/qcom,msm-dai-q6-dp";
		loopback = "/soc/qcom,msm-pcm-loopback";
		msm_dai_mi2s = "/soc/qcom,msm-dai-mi2s";
		dai_mi2s0 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-prim";
		dai_mi2s1 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-sec";
		dai_mi2s2 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-tert";
		dai_mi2s3 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quat";
		dai_mi2s4 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quin";
		dai_mi2s5 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-senary";
		lsm = "/soc/qcom,msm-lsm-client";
		sb_0_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-0-rx";
		sb_0_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-0-tx";
		sb_1_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-1-rx";
		sb_1_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-1-tx";
		sb_2_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-2-rx";
		sb_2_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-2-tx";
		sb_3_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-3-rx";
		sb_3_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-3-tx";
		sb_4_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-4-rx";
		sb_4_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-4-tx";
		sb_5_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-5-tx";
		sb_5_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-5-rx";
		sb_6_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-6-rx";
		sb_7_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-rx";
		sb_7_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-tx";
		sb_8_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-8-rx";
		sb_8_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-8-tx";
		bt_sco_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-rx";
		bt_sco_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-tx";
		int_fm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-rx";
		int_fm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-tx";
		afe_pcm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-rx";
		afe_pcm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-tx";
		afe_proxy_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-rx";
		afe_proxy_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-tx";
		afe_loopback_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-loopback-tx";
		incall_record_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-rx";
		incall_record_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-tx";
		incall_music_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-rx";
		incall_music_2_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-2-rx";
		usb_audio_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-rx";
		usb_audio_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-tx";
		hostless = "/soc/qcom,msm-pcm-hostless";
		audio_apr = "/soc/qcom,msm-audio-apr";
		dai_pri_auxpcm = "/soc/qcom,msm-pri-auxpcm";
		dai_sec_auxpcm = "/soc/qcom,msm-sec-auxpcm";
		dai_tert_auxpcm = "/soc/qcom,msm-tert-auxpcm";
		dai_quat_auxpcm = "/soc/qcom,msm-quat-auxpcm";
		dai_quin_auxpcm = "/soc/qcom,msm-quin-auxpcm";
		hdmi_dba = "/soc/qcom,msm-hdmi-dba-codec-rx";
		msm_audio_ion = "/soc/qcom,msm-audio-ion";
		dai_pri_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-pri-rx/qcom,msm-dai-q6-tdm-pri-rx-0";
		dai_pri_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-pri-tx/qcom,msm-dai-q6-tdm-pri-tx-0";
		dai_sec_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-sec-rx/qcom,msm-dai-q6-tdm-sec-rx-0";
		dai_sec_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-sec-tx/qcom,msm-dai-q6-tdm-sec-tx-0";
		dai_tert_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-tert-rx/qcom,msm-dai-q6-tdm-tert-rx-0";
		dai_tert_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-tert-tx/qcom,msm-dai-q6-tdm-tert-tx-0";
		dai_quat_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quat-rx/qcom,msm-dai-q6-tdm-quat-rx-0";
		dai_quat_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quat-tx/qcom,msm-dai-q6-tdm-quat-tx-0";
		dai_quin_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quin-rx/qcom,msm-dai-q6-tdm-quin-rx-0";
		dai_quin_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quin-tx/qcom,msm-dai-q6-tdm-quin-tx-0";
		int_codec = "/soc/sound";
		cdc_us_euro_sw = "/soc/msm_cdc_pinctrl_us_euro_sw";
		cdc_pri_mi2s_gpios = "/soc/msm_cdc_pinctrl_pri";
		cdc_quin_mi2s_gpios = "/soc/msm_cdc_pinctrl_quin";
		firmware = "/firmware";
		other_ext_mem = "/reserved-memory/other_ext_region@0";
		modem_mem = "/reserved-memory/modem_region@0";
		adsp_fw_mem = "/reserved-memory/adsp_fw_region@0";
		wcnss_fw_mem = "/reserved-memory/wcnss_fw_region@0";
		venus_mem = "/reserved-memory/venus_region@0";
		secure_mem = "/reserved-memory/secure_region@0";
		qseecom_mem = "/reserved-memory/qseecom_region@0";
		qseecom_ta_mem = "/reserved-memory/qseecom_ta_region";
		adsp_mem = "/reserved-memory/adsp_region@0";
		cont_splash_mem = "/reserved-memory/splash_region@83000000";
		dump_mem = "/reserved-memory/mem_dump_region";
		vendor = "/vendor";
		energy_costs = "/energy-costs";
		CPU_COST_0 = "/energy-costs/core-cost0";
		CLUSTER_COST_0 = "/energy-costs/cluster-cost0";
		qrd_batterydata = "/qcom,batterydata";
	};
};