/dts-v1/;

/ {
	model = "Qualcomm Technologies, Inc. DB820c";
	interrupt-parent = <0x1>;
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x0>;
	};

	cpus {
		#address-cells = <0x2>;
		#size-cells = <0x0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = <0x0 0x0>;
			enable-method = "psci";
			next-level-cache = <0x2>;
			phandle = <0x4>;

			l2-cache {
				compatible = "cache";
				cache-level = <0x2>;
				phandle = <0x2>;
			};
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = <0x0 0x1>;
			enable-method = "psci";
			next-level-cache = <0x2>;
			phandle = <0x5>;
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = <0x0 0x100>;
			enable-method = "psci";
			next-level-cache = <0x3>;
			phandle = <0x6>;

			l2-cache {
				compatible = "cache";
				cache-level = <0x2>;
				phandle = <0x3>;
			};
		};

		cpu@101 {
			device_type = "cpu";
			compatible = "qcom,kryo";
			reg = <0x0 0x101>;
			enable-method = "psci";
			next-level-cache = <0x3>;
			phandle = <0x7>;
		};

		cpu-map {

			cluster0 {

				core0 {
					cpu = <0x4>;
				};

				core1 {
					cpu = <0x5>;
				};
			};

			cluster1 {

				core0 {
					cpu = <0x6>;
				};

				core1 {
					cpu = <0x7>;
				};
			};
		};
	};

	thermal-zones {

		cpu-thermal0 {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x8 0x3>;

			trips {

				trip0 {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x22>;
				};

				trip1 {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x23>;
				};
			};
		};

		cpu-thermal1 {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x8 0x5>;

			trips {

				trip0 {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x24>;
				};

				trip1 {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x25>;
				};
			};
		};

		cpu-thermal2 {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x8 0x8>;

			trips {

				trip0 {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x26>;
				};

				trip1 {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x27>;
				};
			};
		};

		cpu-thermal3 {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x8 0xa>;

			trips {

				trip0 {
					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x28>;
				};

				trip1 {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x29>;
				};
			};
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	clocks {

		xo_board {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x124f800>;
			clock-output-names = "xo_board";
		};

		sleep_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x7ffc>;
			clock-output-names = "sleep_clk";
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	soc {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x0 0xffffffff>;
		compatible = "simple-bus";
		phandle = <0x2a>;

		interrupt-controller@9bc0000 {
			compatible = "arm,gic-v3";
			#interrupt-cells = <0x3>;
			interrupt-controller;
			#redistributor-regions = <0x1>;
			redistributor-stride = <0x0 0x40000>;
			reg = <0x9bc0000 0x10000 0x9c00000 0x100000>;
			interrupts = <0x1 0x9 0x4>;
			phandle = <0x1>;
		};

		clock-controller@300000 {
			compatible = "qcom,gcc-msm8996";
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			#power-domain-cells = <0x1>;
			reg = <0x300000 0x90000>;
			phandle = <0x9>;
		};

		spi@07575000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x7575000 0x600>;
			interrupts = <0x0 0x5f 0x4>;
			clocks = <0x9 0x6f 0x9 0x6d>;
			clock-names = "core", "iface";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0xa>;
			pinctrl-1 = <0xb>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			label = "LS-SPI0";
			phandle = <0x2b>;
		};

		i2c@075b5000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x75b5000 0x1000>;
			interrupts = <0x0 0x65 0x0>;
			clocks = <0x9 0x81 0x9 0x84>;
			clock-names = "iface", "core";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0xc>;
			pinctrl-1 = <0xd>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			label = "HS-I2C2";
			phandle = <0x2c>;
		};

		thermal-sensor@4a8000 {
			compatible = "qcom,msm8996-tsens";
			reg = <0x4a8000 0x2000>;
			#thermal-sensor-cells = <0x1>;
			phandle = <0x8>;
		};

		serial@75b0000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x75b0000 0x1000>;
			interrupts = <0x0 0x72 0x4>;
			clocks = <0x9 0x88 0x9 0x81>;
			clock-names = "core", "iface";
			status = "okay";
			label = "LS-UART1";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0xe>;
			pinctrl-1 = <0xf>;
			phandle = <0x2d>;
		};

		i2c@075b6000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x75b6000 0x1000>;
			interrupts = <0x0 0x66 0x0>;
			clocks = <0x9 0x81 0x9 0x87>;
			clock-names = "iface", "core";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x10>;
			pinctrl-1 = <0x11>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			label = "LS-I2C1";
			phandle = <0x2e>;
		};

		serial@75b1000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x75b1000 0x1000>;
			interrupts = <0x0 0x73 0x4>;
			clocks = <0x9 0x8b 0x9 0x81>;
			clock-names = "core", "iface";
			status = "okay";
			label = "LS-UART0";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x12>;
			pinctrl-1 = <0x13>;
			phandle = <0x2f>;
		};

		i2c@07577000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x7577000 0x1000>;
			interrupts = <0x0 0x61 0x0>;
			clocks = <0x9 0x6d 0x9 0x76>;
			clock-names = "iface", "core";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x14>;
			pinctrl-1 = <0x15>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			label = "LS-I2C0";
			phandle = <0x30>;
		};

		spi@075ba000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x75ba000 0x600>;
			interrupts = <0x0 0x6a 0x4>;
			clocks = <0x9 0x92 0x9 0x81>;
			clock-names = "core", "iface";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x16>;
			pinctrl-1 = <0x17>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			label = "HS-SPI1";
			phandle = <0x31>;
		};

		sdhci@74a4900 {
			status = "okay";
			compatible = "qcom,sdhci-msm-v4";
			reg = <0x74a4900 0x314 0x74a4000 0x800>;
			reg-names = "hc_mem", "core_mem";
			interrupts = <0x0 0x7d 0x0 0x0 0xdd 0x0>;
			interrupt-names = "hc_irq", "pwr_irq";
			clock-names = "iface", "core";
			clocks = <0x9 0x68 0x9 0x67>;
			bus-width = <0x4>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x18 0x19 0x1a 0x1b>;
			pinctrl-1 = <0x1c 0x1d 0x1e 0x1f>;
			cd-gpios = <0x20 0x26 0x1>;
			phandle = <0x32>;
		};

		pinctrl@1010000 {
			compatible = "qcom,msm8996-pinctrl";
			reg = <0x1010000 0x300000>;
			interrupts = <0x0 0xd0 0x4>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x20>;

			blsp1_spi0_default {
				phandle = <0xa>;

				pinmux {
					function = "blsp_spi1";
					pins = "gpio0", "gpio1", "gpio3";
				};

				pinmux_cs {
					function = "gpio";
					pins = "gpio2";
				};

				pinconf {
					pins = "gpio0", "gpio1", "gpio3";
					drive-strength = <0xc>;
					bias-disable;
				};

				pinconf_cs {
					pins = "gpio2";
					drive-strength = <0x10>;
					bias-disable;
					output-high;
				};
			};

			blsp1_spi0_sleep {
				phandle = <0xb>;

				pinmux {
					function = "gpio";
					pins = "gpio0", "gpio1", "gpio2", "gpio3";
				};

				pinconf {
					pins = "gpio0", "gpio1", "gpio2", "gpio3";
					drive-strength = <0x2>;
					bias-pull-down;
				};
			};

			blsp1_i2c2_default {
				phandle = <0x14>;

				pinmux {
					function = "blsp_i2c3";
					pins = "gpio47", "gpio48";
				};

				pinconf {
					pins = "gpio47", "gpio48";
					drive-strength = <0x10>;
					bias-disable = <0x0>;
				};
			};

			blsp1_i2c2_sleep {
				phandle = <0x15>;

				pinmux {
					function = "gpio";
					pins = "gpio47", "gpio48";
				};

				pinconf {
					pins = "gpio47", "gpio48";
					drive-strength = <0x2>;
					bias-disable = <0x0>;
				};
			};

			blsp2_i2c0 {
				phandle = <0xc>;

				pinmux {
					function = "blsp_i2c7";
					pins = "gpio55", "gpio56";
				};

				pinconf {
					pins = "gpio55", "gpio56";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_i2c0_sleep {
				phandle = <0xd>;

				pinmux {
					function = "gpio";
					pins = "gpio55", "gpio56";
				};

				pinconf {
					pins = "gpio55", "gpio56";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_uart1_2pins {
				phandle = <0xe>;

				pinmux {
					function = "blsp_uart8";
					pins = "gpio4", "gpio5";
				};

				pinconf {
					pins = "gpio4", "gpio5";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_uart1_2pins_sleep {
				phandle = <0xf>;

				pinmux {
					function = "gpio";
					pins = "gpio4", "gpio5";
				};

				pinconf {
					pins = "gpio4", "gpio5";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_uart1_4pins {
				phandle = <0x33>;

				pinmux {
					function = "blsp_uart8";
					pins = "gpio4", "gpio5", "gpio6", "gpio7";
				};

				pinconf {
					pins = "gpio4", "gpio5", "gpio6", "gpio7";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_uart1_4pins_sleep {
				phandle = <0x34>;

				pinmux {
					function = "gpio";
					pins = "gpio4", "gpio5", "gpio6", "gpio7";
				};

				pinconf {
					pins = "gpio4", "gpiio5", "gpio6", "gpio7";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_i2c1 {
				phandle = <0x10>;

				pinmux {
					function = "blsp_i2c8";
					pins = "gpio6", "gpio7";
				};

				pinconf {
					pins = "gpio6", "gpio7";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_i2c1_sleep {
				phandle = <0x11>;

				pinmux {
					function = "gpio";
					pins = "gpio6", "gpio7";
				};

				pinconf {
					pins = "gpio6", "gpio7";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_uart2_2pins {
				phandle = <0x35>;

				pinmux {
					function = "blsp_uart9";
					pins = "gpio49", "gpio50";
				};

				pinconf {
					pins = "gpio49", "gpio50";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_uart2_2pins_sleep {
				phandle = <0x36>;

				pinmux {
					function = "gpio";
					pins = "gpio49", "gpio50";
				};

				pinconf {
					pins = "gpio49", "gpio50";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_uart2_4pins {
				phandle = <0x12>;

				pinmux {
					function = "blsp_uart9";
					pins = "gpio49", "gpio50", "gpio51", "gpio52";
				};

				pinconf {
					pins = "gpio49", "gpio50", "gpio51", "gpio52";
					drive-strength = <0x10>;
					bias-disable;
				};
			};

			blsp2_uart2_4pins_sleep {
				phandle = <0x13>;

				pinmux {
					function = "gpio";
					pins = "gpio49", "gpio50", "gpio51", "gpio52";
				};

				pinconf {
					pins = "gpio49", "gpio50", "gpio51", "gpio52";
					drive-strength = <0x2>;
					bias-disable;
				};
			};

			blsp2_spi5_default {
				phandle = <0x16>;

				pinmux {
					function = "blsp_spi12";
					pins = "gpio85", "gpio86", "gpio88";
				};

				pinmux_cs {
					function = "gpio";
					pins = "gpio87";
				};

				pinconf {
					pins = "gpio85", "gpio86", "gpio88";
					drive-strength = <0xc>;
					bias-disable;
				};

				pinconf_cs {
					pins = "gpio87";
					drive-strength = <0x10>;
					bias-disable;
					output-high;
				};
			};

			blsp2_spi5_sleep {
				phandle = <0x17>;

				pinmux {
					function = "gpio";
					pins = "gpio85", "gpio86", "gpio87", "gpio88";
				};

				pinconf {
					pins = "gpio85", "gpio86", "gpio87", "gpio88";
					drive-strength = <0x2>;
					bias-pull-down;
				};
			};

			sdc2_clk_on {
				phandle = <0x18>;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = <0x10>;
				};
			};

			sdc2_clk_off {
				phandle = <0x1c>;

				config {
					pins = "sdc2_clk";
					bias-disable;
					drive-strength = <0x2>;
				};
			};

			sdc2_cmd_on {
				phandle = <0x19>;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = <0xa>;
				};
			};

			sdc2_cmd_off {
				phandle = <0x1d>;

				config {
					pins = "sdc2_cmd";
					bias-pull-up;
					drive-strength = <0x2>;
				};
			};

			sdc2_data_on {
				phandle = <0x1a>;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = <0xa>;
				};
			};

			sdc2_data_off {
				phandle = <0x1e>;

				config {
					pins = "sdc2_data";
					bias-pull-up;
					drive-strength = <0x2>;
				};
			};

			sdc2_cd_on {
				phandle = <0x1b>;

				mux {
					pins = "gpio38";
					function = "gpio";
				};

				config {
					pins = "gpio38";
					bias-pull-up;
					drive-strength = <0x10>;
				};
			};

			sdc2_cd_off {
				phandle = <0x1f>;

				mux {
					pins = "gpio38";
					function = "gpio";
				};

				config {
					pins = "gpio38";
					bias-pull-up;
					drive-strength = <0x2>;
				};
			};
		};

		timer@09840000 {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0x9840000 0x1000>;
			clock-frequency = <0x124f800>;

			frame@9850000 {
				frame-number = <0x0>;
				interrupts = <0x0 0x1f 0x4 0x0 0x1e 0x4>;
				reg = <0x9850000 0x1000 0x9860000 0x1000>;
			};

			frame@9870000 {
				frame-number = <0x1>;
				interrupts = <0x0 0x20 0x4>;
				reg = <0x9870000 0x1000>;
				status = "disabled";
			};

			frame@9880000 {
				frame-number = <0x2>;
				interrupts = <0x0 0x21 0x4>;
				reg = <0x9880000 0x1000>;
				status = "disabled";
			};

			frame@9890000 {
				frame-number = <0x3>;
				interrupts = <0x0 0x22 0x4>;
				reg = <0x9890000 0x1000>;
				status = "disabled";
			};

			frame@98a0000 {
				frame-number = <0x4>;
				interrupts = <0x0 0x23 0x4>;
				reg = <0x98a0000 0x1000>;
				status = "disabled";
			};

			frame@98b0000 {
				frame-number = <0x5>;
				interrupts = <0x0 0x24 0x4>;
				reg = <0x98b0000 0x1000>;
				status = "disabled";
			};

			frame@98c0000 {
				frame-number = <0x6>;
				interrupts = <0x0 0x25 0x4>;
				reg = <0x98c0000 0x1000>;
				status = "disabled";
			};
		};

		qcom,spmi@400f000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0x400f000 0x1000 0x4400000 0x800000 0x4c00000 0x800000 0x5800000 0x200000 0x400a000 0x2100>;
			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
			interrupt-names = "periph_irq";
			interrupts = <0x0 0x146 0x4>;
			qcom,ee = <0x0>;
			qcom,channel = <0x0>;
			#address-cells = <0x2>;
			#size-cells = <0x0>;
			interrupt-controller;
			#interrupt-cells = <0x4>;
			phandle = <0x37>;
		};

		clock-controller@8c0000 {
			compatible = "qcom,mmcc-msm8996";
			#clock-cells = <0x1>;
			#reset-cells = <0x1>;
			#power-domain-cells = <0x1>;
			reg = <0x8c0000 0x40000>;
			assigned-clocks = <0x21 0xf 0x21 0x3 0x21 0x7 0x21 0x9 0x21 0xb>;
			assigned-clock-rates = <0x25317c00 0x30479e80 0x3a699d00 0x39387000 0x312c8040>;
			phandle = <0x21>;
		};
	};

	aliases {
		serial0 = "/soc/serial@75b0000";
		serial1 = "/soc/serial@75b1000";
		i2c0 = "/soc/i2c@07577000";
		i2c1 = "/soc/i2c@075b6000";
		i2c2 = "/soc/i2c@075b5000";
		spi0 = "/soc/spi@07575000";
		spi1 = "/soc/spi@075ba000";
	};

	__symbols__ {
		CPU0 = "/cpus/cpu@0";
		L2_0 = "/cpus/cpu@0/l2-cache";
		CPU1 = "/cpus/cpu@1";
		CPU2 = "/cpus/cpu@100";
		L2_1 = "/cpus/cpu@100/l2-cache";
		CPU3 = "/cpus/cpu@101";
		cpu_alert0 = "/thermal-zones/cpu-thermal0/trips/trip0";
		cpu_crit0 = "/thermal-zones/cpu-thermal0/trips/trip1";
		cpu_alert1 = "/thermal-zones/cpu-thermal1/trips/trip0";
		cpu_crit1 = "/thermal-zones/cpu-thermal1/trips/trip1";
		cpu_alert2 = "/thermal-zones/cpu-thermal2/trips/trip0";
		cpu_crit2 = "/thermal-zones/cpu-thermal2/trips/trip1";
		cpu_alert3 = "/thermal-zones/cpu-thermal3/trips/trip0";
		cpu_crit3 = "/thermal-zones/cpu-thermal3/trips/trip1";
		soc = "/soc";
		intc = "/soc/interrupt-controller@9bc0000";
		gcc = "/soc/clock-controller@300000";
		blsp1_spi0 = "/soc/spi@07575000";
		blsp2_i2c0 = "/soc/i2c@075b5000";
		tsens0 = "/soc/thermal-sensor@4a8000";
		blsp2_uart1 = "/soc/serial@75b0000";
		blsp2_i2c1 = "/soc/i2c@075b6000";
		blsp2_uart2 = "/soc/serial@75b1000";
		blsp1_i2c2 = "/soc/i2c@07577000";
		blsp2_spi5 = "/soc/spi@075ba000";
		sdhc2 = "/soc/sdhci@74a4900";
		msmgpio = "/soc/pinctrl@1010000";
		blsp1_spi0_default = "/soc/pinctrl@1010000/blsp1_spi0_default";
		blsp1_spi0_sleep = "/soc/pinctrl@1010000/blsp1_spi0_sleep";
		blsp1_i2c2_default = "/soc/pinctrl@1010000/blsp1_i2c2_default";
		blsp1_i2c2_sleep = "/soc/pinctrl@1010000/blsp1_i2c2_sleep";
		blsp2_i2c0_default = "/soc/pinctrl@1010000/blsp2_i2c0";
		blsp2_i2c0_sleep = "/soc/pinctrl@1010000/blsp2_i2c0_sleep";
		blsp2_uart1_2pins_default = "/soc/pinctrl@1010000/blsp2_uart1_2pins";
		blsp2_uart1_2pins_sleep = "/soc/pinctrl@1010000/blsp2_uart1_2pins_sleep";
		blsp2_uart1_4pins_default = "/soc/pinctrl@1010000/blsp2_uart1_4pins";
		blsp2_uart1_4pins_sleep = "/soc/pinctrl@1010000/blsp2_uart1_4pins_sleep";
		blsp2_i2c1_default = "/soc/pinctrl@1010000/blsp2_i2c1";
		blsp2_i2c1_sleep = "/soc/pinctrl@1010000/blsp2_i2c1_sleep";
		blsp2_uart2_2pins_default = "/soc/pinctrl@1010000/blsp2_uart2_2pins";
		blsp2_uart2_2pins_sleep = "/soc/pinctrl@1010000/blsp2_uart2_2pins_sleep";
		blsp2_uart2_4pins_default = "/soc/pinctrl@1010000/blsp2_uart2_4pins";
		blsp2_uart2_4pins_sleep = "/soc/pinctrl@1010000/blsp2_uart2_4pins_sleep";
		blsp2_spi5_default = "/soc/pinctrl@1010000/blsp2_spi5_default";
		blsp2_spi5_sleep = "/soc/pinctrl@1010000/blsp2_spi5_sleep";
		sdc2_clk_on = "/soc/pinctrl@1010000/sdc2_clk_on";
		sdc2_clk_off = "/soc/pinctrl@1010000/sdc2_clk_off";
		sdc2_cmd_on = "/soc/pinctrl@1010000/sdc2_cmd_on";
		sdc2_cmd_off = "/soc/pinctrl@1010000/sdc2_cmd_off";
		sdc2_data_on = "/soc/pinctrl@1010000/sdc2_data_on";
		sdc2_data_off = "/soc/pinctrl@1010000/sdc2_data_off";
		sdc2_cd_on = "/soc/pinctrl@1010000/sdc2_cd_on";
		sdc2_cd_off = "/soc/pinctrl@1010000/sdc2_cd_off";
		spmi_bus = "/soc/qcom,spmi@400f000";
		mmcc = "/soc/clock-controller@8c0000";
	};
};